Job Description and Requirements
At Synopsys, we are enthusiastic learners and seasoned inventors. We are makers and visionaries who make technology safer. We are innovators who develop the software and hardware that drive the world’s high-performing chips for amazing things like autonomous vehicles, smart homes, and machines that learn. We embrace diversity as a company, so we can create solutions that serve not just technology but the humans behind it.
- The successful candidate will join a talented Synopsys SLM development team and will have the challenging technical opportunity on various ASIC CAD flow developments and deployments.
- More than 4+ years of Develop and support ASIC EDA flow automation and methodology, familiar with ASIC CAD tools such as Fusion Compiler, Primetime, ICV and etc.
- Create, release, and maintain standard design scripts to automate EDA tools & flows involves on Synopsys Design tools
- Experience in physical design and verification with knowledge in blocks to timing,
- Fluency in scripting languages (TCL, PERC, Python) and ability to develop tools for ASIC automation.
- Excellent analytical, problem solving and debugging skills with strong interest in semiconductor technology.
- BSEE/CE, or MSEE/PhD with at least 4+ years of industry EDA experience on advanced FINFET nodes
- Experience in all phases of CAD tools from evaluation, QA, test, release, and user support to documentation
- Expert in Unix Shell, utilities and scripting language such as Perl/TCL/Python
- Excellent interpersonal, communication, and presentation skills, along with strong multi-tasking skills, attention to details, and ability to work well in a team & time zone
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To view the job application please visit sjobs.brassring.com.