Software Engineer II

Position Responsibility

• Software Researcher/Developer to providing solutions for Hierarchical Chip Design
• Handle large chip design data, provide solution for model reduction, hierarchical flow, 3D-IC analysis and chip assembling.

Position Qualification

• Knowledge in chip design flow, including Placement, Routing, and Timing Closure Analysis.
• Knowledge in algorithm for implementing placement, routing or floor-planning engine.
• Programming experience in C/C++ required, TCL, Verilog preferred
• Master/Ph.D. degree  in Science or Engineering, Electrical and/or Computer Engineering preferred.