SoftLogic Design Verification Engineer

Flex Logix develops industry-leading AI inference engines and is the #1 provider of eFPGA solutions. Our InferX X1 chipset is the industry’s fastest and most-efficient AI edge inference accelerator.  Our architecture is covered by dozens of patents and is highly differentiated, giving us a sustainable competitive advantage.

One significant advantage of the Flex solution is its synergistic combination of software and hardware, and a key part of that synergy is the SoftLogic team.  The SoftLogic team develops RTL that controls the execution (compute and memory) of the Flex Logix X1, which is a compute engine focused on delivering high performance on ML and AI mathematical kernels such as convolution, and transformers.  Flex Logix is searching for Design Verification Engineers to join its SoftLogic team to verify not just the logic of the execution control, but also the mathematics of the kernels.  As such, the position provides the opportunity to do far more than typical RTL verification.

The position of SoftLogic Design Verification Engineer reports directly to the Director of SoftLogic and will work closely with the Senior Director of SDET/QA.   While this position requires direct RTL verification, it offers growth potential into both hardware and software careers.

Responsibilities:

As part of the SoftLogic team, this position is responsible for helping to deliver a high quality, highly-performant SoftLogic component for a highly successful X1 product.  More specific responsibilities include

• Responsible for all aspects of Softlogic Verification which is analogous to IP/Block level verification.
• Development and debug of SV and/or UVM testbenches for highly configurable Softlogic RTL code.
• Development of coverage plans and metrics, drive coverage activities and test writing.
• Gate-Level Simulation debug to verify timing.
• Writing integration tests to verify hardware/software
• Testing overall product functionality as well as specific SoftLogic components
• Collaborate with Softlogic Design Team and Software Developments Teams on testing and debug

Required Abilities and Experience

• BSEE/MSEE with at least 3-5 years of relevant industry experience.
• Deep understanding of Verilog
• Must have hands-on experience with UVM/OVM
• Ability to run and debug Verilog on standard industry simulators such as VCS, NCSIM, and Questa
• Reasonable understanding of ML mathematical kernels such as convolution and transformers.
• Experience with functional coverage analysis and assertion implementation

Additional experience that will be valuable:

• Exposure to verifying highly configurable RTL designs
• FPGA debug exposure
• Successful track record of delivering highest quality verified FPGA/SoC RTL designs which went to mass production
• Some RTL design experience

SoftLogic is a key component of the X1 product and is a critical requirement to the product’s success.   As it bridges hardware and software it presents both unique challenges and a wide range of career path growth opportunities.

For those who thrive on meeting challenges, Flex Logix provides an ideal supportive environment, intelligent personable colleagues, and plenty of interesting problems to challenge you.