Silicon Validation Engineer

Overview

We are looking for an engineer with theoretical knowledge and practical experience to contribute to the lab team.

As a Silicon Validation Engineer, you will be part of an R&D team developing high speed SerDes PHYs.

You will work with a cross functional design team of analog designers and hardware engineers from a wide variety of backgrounds.  Our R&D test lab contains high speed test equipment, examples include: 50 GHz oscilloscopes, 67GHz network analyzer, and 112Gb/s BERTs for SerDes test and debug.

Responsibilities and Duties

• Performing testing on silicon implementations of high-speed analog integrated circuits
• Results analysis and debugging of silicon under test, as well as hardware supporting
• Running characterization tests and creating test reports
• Creating test boards/hardware solutions to support test, debug, and characterization
• Apply theoretical knowledge to analyze and explain circuit behavior and circuit limitations in a testing and characterization environment

Qualifications

• A relevant degree in Electronic Engineering
• Strong Analog IC circuit knowledge
• Strong debugging skills
• SerDes test concepts
• Software programming experience (MATLAB, Python are preferences)
• FPGA programming knowledge (Verilog)
• Knowledge of interface protocols such as Ethernet, PCIe, SATA, and USB3.1
• PCB design knowledge (Altium Designer)
• Knowledge of communication interfaces such as JTAG, I2C and SPI
• Good English communication skills