Compiler Engineer

LEVEL: Please note that we are hiring for several positions on the Compiler Engineering team, and as such invite everybody with at least 2 years of Compiler Engineering experience to apply.
Responsibilities

Evolve, design and build new compiler intermediate representations for hardware design and tool flows.
Implement specific compiler optimization and lowering algorithms for chip design flows.
Implement state of the art mechanisms for hierarchical caching that crosscut compiler and build systems.
Participate in design discussions, planning, code review, documentation, open source processes, and other standard software practices.
Collaborate with hardware architects to develop the approach and design flows.
Manage your individual project priorities, deadlines and deliverables.
Requirements

We are hiring for several positions with different levels of seniority, but require a minimum of 2 years of compiler engineering experience.
Strong oral and written communication skills, excellent team collaboration.
Experience with C++ programming and git-based development workflows.
Experience with Verilog and other chip design technologies is NOT required.
SiFive is proud to be an equal employment opportunity workplace. We offer a competitive compensation package that includes flexible paid time off; health, vision and dental benefits; 401(k) plan; employee stock option program, and much more.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
If you yearn to be challenged and wish to work in an environment where the boundaries of your creativity and skills will be tested, then SiFive is the place for you.