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Senior Hardware Design Verification Engineer

Senior Hardware Design Verification Engineer
by Admin on 12-22-2023 at 3:11 pm

Website ArterisIP

Description

Arteris enables engineering and design teams at the world’s most transformative brands to connect and integrate today’s system-on-chips (SoCs) that fuel modern innovation.

If you’ve held a smartphone, driven an electronic car, or powered up a smart TV, you’ve come in contact with what we do at Arteris. Here, the future is quite literally in your hands—and when it isn’t, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter!

Key Responsibilities:

  • Advanced UVM based test bench development and debugging
  • Defining, documenting, developing and executing RTL verification test/coverage for very parametrized IPs in Python C++ and SystemVerilog language
  • Performance verification and power-aware verification
  • Triaging Regressions, Debugging RTL designs
  • Help improve and refine verification process, methodology, and metrics
  • UVM expertise on complex SoC projects from test bench development to verification closure

Experience Requirements / Qualifications:

  • 7+ years of industry experience as a Verification Engineer
  • Knowledge of Verilog or SystemVerilog.
  • Knowledge of interconnect technology is a plus
  • Knowledge of Cache architecture is a plus.
  • Knowledge of AMBA protocols and AMBA VIP.
  • Experience with C / C++ or Python or JavaScript is a plus.
  • Good written and verbal communication skills in both French and English
  • Curious, autonomous, rigorous, and delivery-oriented with a commitment to quality and a thorough approach to the work.
  • Proven ability to work well within a team

Education Requirements:

  • Engineering Master’s Degree

Position based on Montigny-le-Bretonneux (78) – 2 remote days per week possible

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.

With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease.  Learn more at arteris.com.

Apply for job

To view the job application please visit www.arteris.com.

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