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Senior Digital Designer DFT

Senior Digital Designer DFT
by Admin on 07-20-2020 at 12:45 pm

  • Full Time
  • Meylan (FRA)
  • Applications have closed

As a leader in digital design methodologies, you will help make our IPs and IP platforms easy to integrate into our clients’ design flows.
As a point of reference within the team, the position includes technical support for the pre / post sales activities of the customers and the deployment of state of the art DFT design methodologies.

YOUR MAIN MISSIONS

1-Project execution:
Define, implement and supervise DFT activities for ASIC and IPs projects in order to guarantee technical consistency between products and design methodologies and to commit to the project stages:
• IJTAG DFT infrastructure, memory BIST, insertion / compression scan, BIST logic, etc.
• Interface with IP providers for DFT subjects
• Project configuration for DFT implementation
• Debugging, verification and DFT reports
• Generation and delivery of ATPG models
• Support internal / external laboratories during chip tests (EWS)

2-Methodology:
Lead the development and maintenance of DFT design flows for ASIC / IP projects, from the definition of the architecture to the physical implementation, in order to target a minimum test time for all Dolphin products.
This also includes:
• Development of a cutting edge DFT strategy in line with IP and ASIC requirements. Creation of a generic DFT infrastructure in accordance with mission 1
• Review and update of the DFT synthesis + flow with the aim of reducing costs by 30%
• Continuous improvement of techniques and technological tools. Create a lasting relationship with EDA 3-Customer Support suppliers

:
• Main referent for technical discussions with customers regarding DFT design flows
• Provide technical support and advice to customers during pre / after sales discussions

4-Project Support:
• Execute and / or participate in the execution of the project for DFT activities
• Work in close collaboration with project managers for the rating, planning, review and overall monitoring of the project

THIS JOB IS MADE FOR YOU!
Engineer training or Bac + 5 in microelectronics, You have an experience of 10 years or more in a similar position or / and in the fields of Microelectronics / Electronics / IT

Skills required:
• Architecture, design and implementation
flow DFT Soc and IP for a minimum test duration • MBIST, scan insertion / compression, BIST logic, IJTAG protocol
• RTL, Verilog, VHDL, System Verilog coding
• Netlist Gate simulations
• EDA Cadence, Mentor and Synopsys tools. Mentor Tessent Mandatory.
• Scripting: Tcl, Shell, Perl, Python…
• Development of the DFT infrastructure and the use of tools such as Tessent, Design Compiler, Tetramax.

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