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RTL Design Engineer – HLS (CZ)

RTL Design Engineer – HLS (CZ)
by Admin on 04-07-2022 at 3:39 pm

Website Codasip

Codasip was founded on a simple belief – we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that made design simpler, faster, and less expensive. The company was created in 2014 with the mission of democratizing processor design. Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM.

The High Level Synthesis team (led by Honza Bartůšek) is working on our EDA tool, Codasip Studio, which provides help to our customers and our IP engineers with RISC-V processors design.

Honza´s team is primarily focused on:

  • The tool, that automatically generates microprocessor hardware representation from the definition in Codal language
  • RTL design and verification of generic microprocessor components (cache, buses, on-chip debugger, …)
  • Codasip Studio tool orchestration framework (written in Python)

YOUR CORE RESPONSIBILITIES WILL BE:

  • Create RTL prototypes of the processor units in Codasip Studio (memory, cache, TCM, OCD, trace, etc.)
  • Work with AMBA buses (AHB, AXI, ACE)
  • Participate in the development of our commercial processor cores
  • Revise internal processors´ prototypes in the CodAL language
  • Extend on-chip debugger according to RISC-V Debug/Nexus /JTAG specification
  • Synthesize RTL code, analyze results, optimize
  • Work with tools for RTL code verification
  • Optimize and reduce energy consumption (low power)

YOU SHOULD HAVE:

  • 2 years of experience (university internship in IT/electro fields could be a good background as well)
  • Advanced knowledge of at least one HDL language (VHDL/Verilog/SystemVerilog)
  • Active usage of HW synthesis tools for ASIC/FPGA (e.g.Xilinx ISE, Xilinx Vivado, Synopsys DC, Cadence RC/Genus)
  • Experience in HW design debugging (using a logic analyzer, ChipScope, JTAG, etc.)
  • Analytical thinking, self-sufficiency, and openness to team collaboration
  • At least passive knowledge of English

NICE-TO-HAVES:

  • Familiarity with the area of computer systems and architectures
  • Knowledge of versioning tools (Git, SVN)
  • Experience with microcontroller programming (e.g. AVR/PIC/ARM/…, JTAG, OpenOCD)
  • Knowledge of C++
  • Experience with HW verification
  • Knowledge of scripting languages (Python, Tcl)

This position is based in our R&D centers in Brno or Prague.

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