1. Rigorous litho process simulation technology development
2. Compact/machine-learning OPC modeling technology development
3. N3/N2 OPC model template development and maintenance
1. Familiar with grid or non-grid numerical methods for stress/thermal/fluid simulations.
2. Knowledge and background on microlithography or wafer bonding process.
3. Job experience in OPC, wafer process, or mask making.
4. PHD in Material/EE/OE/Physics is preferred.
Primary Location: Taiwan-Hsinchu
Job Posting Date: Mar 11, 2020
Unposting Date: Ongoing
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To view the job application please visit tsmc.taleo.net.