- To provide key technical support in digital IC design implementation, product demonstration, and sales presentations.
- To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, for challenging low power, high performance design for 200MHz to several GHz big chips.
- You will be working with internal and external customers for various design.
- The job responsibility covers all the key phases of implementation including RTL analysis, Synthesis, Design planning/optimization, timing verification, test insertion, physical design, CTS, STA, MMMC, timing closure and power optimization.
- You will assist in technical evaluation, assessment and delivery of concurrent ASIC/SoC designs.
- To play a leading role among other team members, while receive little instruction on routine and general assignments.
- You will also be able to lead some junior engineers to execute several HLB among customers to deliver result in time with requested quality.
- A master’s degree is essential and 5+ years’ experience in IC design, electronic engineering or computer science applications. or bachelor’s degree with 6+ years’ experience.
- Tape out experience in, 28nm or below technology (down to 5nm), be insightful to make enhancement for design methodology/flow/script.
- Ability to understand and articulate technical issues, (and knowledge of) design products and their applications.
- Good communication skill and self-manage attitude. Fluent English in Speaking is must. Japanese or Korean speaking is a plus.
- Requires working knowledge of one or more programming languages, and effective communication and soft skills.
- Working experience in multi-nation IC design house is a plus.
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To view the job application please visit cadence.wd1.myworkdayjobs.com.