Principal Application Engineer
Website Cadence
Position Description:
- To provide key technical support in digital IC design implementation, product demonstration, and sales presentations.
- To demonstrate strong ability and to be hands-on in RTL-to-GDSII design methodology, for challenging low power designs, for 200MHz to several GHz big chips.
- Have real design experience including conformal check, logic synthesis, P&R, CTS, SSTA, MMMC to close timing, power and die area.
- Assist in technical evaluation, assessment and delivery of concurrent ASIC/SoC designs.To play a leading role among other team members, while receive little instruction on routine and general assignments.
Position Requirements:
- A bachelor’s degree is essential and 6+ years’ experience in IC design, electronic engineering or computer science applications.
- Ability to understand and articulate technical issues, (and knowledge of) design products and their applications.
- Requires working knowledge of one or more programming languages, and effective communication and soft skills.
- An MS degree and/or working experience in multi-nation IC design house is a plus.
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