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Physical Implementation Engineer

Physical Implementation Engineer
by Admin on 03-29-2022 at 2:04 pm

Website Agile Analog

Agile Analog is revolutionising the way Analog circuits are designed. Based in Cambridge but with the ability to work flexibly, we are growing quickly to become one of the world’s leading semiconductor IP companies. Using our innovative core technology, we are able to design circuits faster, to a higher quality, and on any silicon process.

We are disrupting methodologies that have been unchanged for generations and if you have that similar mindset with the desire to make an impact then play a part in our story.

As a Physical Implementation Engineer, you will be responsible for undertaking the layout of a variety of analog designs in a broad range of different processes (from large geometry to advanced FinFET nodes). Working proactively and collaboratively with the other engineers (including designers, integrators and software engineers), you will be using your knowledge and experience of analog layout on industry standard tools to perform the layout design and physical verification. You will help improve productivity by helping develop and enhance the flows and methodologies to deliver high quality IP that exceeds our customer’s expectations.

Requirements

  • Analog layout of analog IP cells and macros to meet the necessary design rules and IP specifications
  • Physical verification of analog and mixed signal IP including LVS, DRC, PEX and DFM optimisation
  • Contributing to the automation and productivity improvements of the analog layout process
  • Generating high quality customer IP deliverables, including the generation of integration views and ensuring a robust layout flow and review process is followed for all designs
  • Providing technical insight, guidance and expertise across a range of process nodes
  • Working efficiently, proactively and collaboratively with colleagues to deliver high quality IP

What we need from you:

  • Expertise and a proven track record of delivering analog layout on a range of process nodes, (preferably including FinFET and SOI) using industry standard tools.
  • Organised and logical approach to generating analog layout with good spatial awareness and an ability to balance conflicting implementation constraints
  • Solid understanding of device and layout parasitics and the resulting degradations in circuit performance
  • Knowledge of layout techniques used to minimise ESD and latch-up issues
  • Expertise in physical verification of physical IP macros
  • Scripting skills and interest in design automation, ideally in python, Skill etc.
  • Experience of working with PDK’s, rule decks, LVS, DRC, PEX and DFM
  • A can-do attitude and the a desire for continuous improvement

Even better if you have:

  • Experience in RF or high power layout techniques.
  • Analog circuit design experience
  • Digital implementation, integration or P&R skills
  • Knowledge and experience of IC packaging technologies
  • Strong scripting skills and an interest in software development

Benefits

  • A friendly, supportive and inclusive working environment
  • Flexible work hours to fit around your personal commitments
  • We consider individual requirements to work remotely with home set up assistance provided
  • Professional development and professional society membership
  • Company share options
  • 25 days’ annual leave with the option to purchase additional days
  • Company pension scheme (with a salary sacrifice option)
  • Private health insurance (including optical and dental cover)
  • Life Assurance
  • Cycle-to-work scheme
  • Employee Assistance Programme – free wellbeing and health services

If the above role matches your experience, skills and motivations then we would love to hear from you. Please submit your cv along with your salary expectations and we will be in touch shortly.

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