PCIe Webinar Banner

Lead Verification Engineer

Lead Verification Engineer
by Admin on 08-14-2023 at 4:26 pm

Education

  • BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication)

Must haves:

  • Worked on IP and SOC level verification
  • 7-12 years of experience
  • Good experience with Verilog, System Verilog and UVM
  • Experience of SOC Verification of min 7 yrs
  • Experience with multiple of the following protocols: AXI, AHB, DDR, PCIe, Ethernet, MIPI, USB
  • Experience on verification of automotive protocols
  • Excellent Team Player and leader

Good to have:

  • Experience in Formal verification
  • Experience with ISO26262
Share this post via: