lEAD DFT Engineer

Core competencies:

• Led a DFT team for at least two SOCs
• A hold over the complete flow i.e. scan, atpg, structures for delay test, coverage analysis, memory testing, netlist simulations and pattern delivery.
• Ability to decide on the take decision on approaches
• Ability to decide on the the schedule and effects on it due to different approaches.
• Exposure to LBIST, mixed-signal testing and post-silcon bring up
• Exposure to timing or synthesis and should be able to decide on the constraints for the same.
• Ability to mentor the junior team members and drive them for achieving best results.
• Ability to communicate and discuss options with the client.

Email your resume to careers@truechip.net and mention position/location in the subject.