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IO Circuit Design Engineer

IO Circuit Design Engineer
by Admin on 10-07-2022 at 11:23 am

Website Verisilicon

Descriptions

  • Design GPIO library and customization IO, provide instruction on layout.
  • Design ESD protection circuit for Analog/RF IP.
  • Provide ESD protection strategy/guideline, pad cell assignment and ESD review for whole chip.
  • ESD/Latchup test and Failure Analysis.

Requirements

  • Have experience in IO & ESD design,work experience and rank are not limited.
  • M.S. in EE or equivalent.
  • Knowledge in device physics, process, and physical layout.
  • Deep understanding of IO ESD/Latchup protection.
  • Experience on timing model and IBIS model.
  • Experience on DDR/SD/eMMC/LVDS IO is preferred.
  • Self-motivated, good communication skills and team work spirit are a must.
Apply for job

To view the job application please visit www.verisilicon.com.

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