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Intern (Technical-Engineering)

Intern (Technical-Engineering)
by Admin on 08-10-2022 at 4:15 pm

  • Internship
  • Wuhan, China
  • Applications have closed

Website Synopsys

Job Description and Requirements

You will be part of an R&D team developing high speed analog and mixed-signal layout for SerDes IP. You’d leverage your strong understanding of EDA tools, advanced nodes and layout as well as knowledge of ESD and Latch-up. You will work with a cross functional layout team of analog and digital layout designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.

Responsibilities:

  • Complete basic layout work based on project scope
  • Study design manual and verify layout design
  • Follow workflow and deliver high-quality work
  • Learn EDA and layout-drawing tools to operate design
  • Process paperwork and record details in projects

Requirements:

  • Bachelor’s degree or above
  • Major in Microelectronics, Electronic Engineering or Electronic related fields
  • Cognition of integrated circuit layout basics
  • A basic cognition of Unix, EDA tool, and integrated circuit
  • English ability in listening, speaking, reading and writing
  • Willingness to learn

Preferred experience:

  • Excellent English communication
  • A solid knowledge of integrated circuit basics
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