Hardware Verification Team Leader

Codasip is happy to announce a vacant and highly recognised Verification Team Leader position of a team of DV Engineers who are located in the Czech Republic (Brno) and taking care of Low Power Embedded, High-Performance Embedded, and  High-Performance RISC-V application processors, including multiple-issue and/or multi-core architectures.  Moreover, our Verification Domain is split among several European locations – R&D centers in Brno and Prague (Czech Republic), Villeneuve-Loubet (French Design Center),  Munich, Barcelona, Greek R&D (Heraklion and Thessaloniki), and the UK Design Centers (Bristol and Cambridge), which means that you will act in daily concert with our Verification leads – Philippe Luc, Giorgos Nikiforos, Konstantinos Padarnitsas, Paul Sargent, Laurent Arditi, and Christoph Schade, but at the same time, will report directly to the Czech and German Design Centers Manager of IP Engineering.

YOUR CORE RESPONSIBILITIES WILL BE:

• Leading the DV team, which includes:
  • Effort estimation and planning
  • Identifying risks and proposing risk mitigation measures
  • Escalating/resolving dependencies in the team and other teams
  • Reporting the status of the project and performing sing-off reviews
• Being accountable for the delivery of the projects per schedule, scope, budget, and quality
• Contacting retrospective sessions and continuously improving the methodologies or flows
• Developing the team that leads to:
  • Understanding what motivates each team member
  • Professional development (potential training/mentors)
  • Career development (how to grow inside the company)
• Defining the targets/goals for the team and the team members
• Planning regular performance feedback sessions (positive and constructive)

YOU NEED TO POSSESS THE FOLLOWING KNOWLEDGE AND SKILLS:

• Extraordinary teammate with excellent interpersonal skills
• Outstanding team leading and communication skills and experience working with design and verification teams
• Passion for electronics or embedded SW
• Experience with Hardware verification (VHDL/Verilog simulation, formal or UVM)
• Knowledge of versioning tools (Git -preferred)
• Practical usage of Linux
• Software writing skills (C++ or Python preferred)
• Communicative English. Our team is highly distributed, so English is the primary language

NICE-TO-HAVES:

• Desire to play a role in shaping the RISC-V world of tomorrow
• Knowledge of HDL languages (Verilog, VHDL, or System Verilog)
• DIY activities related to open-source software, home automation, robotics, or similar
• University degree in a related field (Microelectronics, HW design, Embedded SW, Robotics, or similar)

WHAT WE CAN OFFER YOU:

• Opportunity to work with RISC-V, computer architecture of the future
• Working on innovative IoT processors and unique processor optimization technology
• Participation in the whole development process from analysis to deployment
• Opportunity to collaborate  with experienced developers located in Germany, France, Greece, the UK, Spain, and Poland
• Receptivity to your own innovations and ideas
• Freedom and trust from Codasip management

WHO IS CODASIP:

Codasip was founded on a simple belief – we could bring together the brilliance of microprocessor architects and software engineers and capture it in tools that make the design simpler, faster, and less expensive. The company was created in 2014 with the mission of democratizing processor design by utilizing our own CodAL architecture description language.

Nowadays Codasip is a leading supplier of processing solutions for IC designers, offering products based on open standards such as the RISC-V ISA, LLVM, and UVM. We are a founding member of RISC-V International (formerly RISC-V Foundation) and we were the first company to offer a commercial RISC-V IP core in 2015. With almost 200 employees and offices in Europe, the US, and China, we are constantly open for talents who want to work on cutting-edge processor technologies, believe in the great potential of RISC-V.

WHAT IS OUR COMPANY CULTURE:

We celebrate a highly professional and open environment, with a well-balanced mix of young and experienced engineers. We employ agile methodologies to bring the speed and ease of software development to hardware as well as to guarantee the high quality of our products. A perfect platform for growth, that will enable you to learn from the best and at the same time drive your own ideas – that is the Codasip DNA.

SOME USEFUL LINKS ON CODASIP:

• Codasip RISC V Processor Solutions
• Design for differentiation: architecture licenses in RISC‑V
• Building a Swiss cheese model approach for processor verification
• Efficient verification of RISC-V processors – Technical paper

We’re passionate about RISC-V processors. If you are, apply now 🙂