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MTS Tapeout Eng

MTS Tapeout Eng
by Daniel Nenni on 07-27-2020 at 7:41 pm

Summary of Duties:

Work with Technology Development, Photolithography, Metrology, Process Integration, Test, Characterization and Mask Manufacturing teams for specifications or requirements for electrical and optical Frame or Process Control Monitor (PCM) structures associated with the manufacture of semiconductor products as well as mask or reticle level information. Use or customize Process Design Kits (PDKs) as well as other physical design tools, to design as well as validate electrical and optical Frame or PCM structures, to enable reticle level products to be manufactured.

Responsible for the accuracy of electrical and optical designs within the overall frame structure as well as mask or reticle level information. Additionally, obtain approval of non-standard results by a Waiver Review Board (WRB) or the Fabrication team when necessary.

Generate and maintain project schedules as well as report, progress on milestones. Facilitate meetings with teams located worldwide. Collaborate with Field Application Engineering, Product Engineering, Tapeout and Design Enablement Teams as well as External Vendors and Customers to provide a best-in-class Tapeout Operations experience.

Lead continuous improvement efforts for an engineering process or for manufacturing productivity. Remote employment permitted.

Position requires a Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field of study or as a CAD design Engineer or related engineering role plus five (5) years of experience in the job offered. Alternatively, will accept a Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field of study, plus six (6) years of experience in the job offered or as a CAD Design Engineer or a related engineering role. Alternatively, will accept a PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field of study, plus three (3) years of experience in the job offered or as a CAD Design Engineer or a related engineering role.

Position requires advanced experience using Cadence Virtuoso or a similar layout tool. Requires advanced experience coding DRC (Design Rule Checking). Requires advanced experience coding LVS (Layout Versus Schematic). Requires advanced experience generating Parameterized cells. Requires experience with Tapeout, new product introduction, and semiconductor fab setup. Requires experience interacting with a semiconductor mask supplier. Requires experience with inline metrology, reticle construction, semiconductor manufacturing, testchips, and reticle frame building. Requires experience with scripting language (PERL or Python or similar scripting language).

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