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FPGA Prototyping Engineer

FPGA Prototyping Engineer
by Admin on 07-11-2022 at 10:35 pm

Website Arm

We are looking for experienced FPGA Engineer to join Arm’s Hardware Platform team on a permanent basis. The team is based in Cambridge, UK and works at the forefront of embedded design with Arm IP products.

We are a multi-disciplinary team with software, FPGA and board design expertise delivering platforms both internally and externally in support Arm’s IP business model. This role will focus on FPGA design and prototyping using off-the-shelf multi-FPGA and smaller custom hardware platforms. You’ll be responsible for the RTL partitioning tool chain used to produce multi-FPGA implementations of sophisticated reference designs as well as prototyping future silicon designs. A major focus of the role is porting RTL not originally intended for FPGA implementation, working closely with verification experts to verify your designs ensuring that FPGA implementations can be delivered in a timely manner.

Do you seek to:

  • Advance new prototyping techniques to enable IP validation, system profiling and software development.
  • Being challenged, working in a constantly evolving environment.
  • Gain a deeper understanding of system architecture and performance.
  • Work alongside many other teams and subject areas including system architects, CPU / System IP designers, physical chip layout / packaging engineers.
  • Interaction with Arm’s partners and customers both through the support organisation and directly.

Then we have a role for you!

What will I be accountable for?

We require a hard-working, methodical engineer to lead the implementation process and ensure that project commitments are kept. You must be able to develop a project plan and keep to the agreed schedule whilst dealing with unplanned debug work to support our customers.

We expect you to work with EDA suppliers to ensure the stability of the implementation tooling and hardware by providing test-cases and being the link between the RTL designers and tooling suppliers. You may also work with third-party IP providers to develop strategies to prototype high-speed IO interfaces to aid our system validation and software teams.

Your main responsibility will the development of FPGA implementation constraints and flows, working in an automated environment to ensure maximum efficiency. Regular delivery of timing clean implementations to software and system-validation teams together with detailed, concise documentation.

The successful candidate will have a strong interest in developing new techniques for the implementation of high-speed interfaces such as DDR and PCIe in prototyping systems.

Essential Skills & Qualities

  • RTL partitioning for multi-FPGA platforms such as HAPS, DINI, etc…
  • Strong RTL skills in either (System) Verilog or VHDL.
  • Detailed knowledge of FPGA synthesis and place & route tools
  • Demonstrate an understanding of ASIC/SoC prototyping, which features can and cannot be implemented in FPGA.
  • Knowledge and expertise in debugging complex designs in both simulation and hardware.
  • Working with the latest Xilinx UltraScale(+) devices and tools.
  • Embedded software knowledge to test and debug designs.
  • A creative and structured approach to problem-solving.
  • Excellent communications & interpersonal skills.
  • A desire for learning and self-improvement.
  • Strong verification skills.
  • Excellent written and spoken English; ability to write coherent documentation.

Desirable Skills and Qualities

The following skills are not essential for this role, but experience in any of the following areas would enhance your application:

  • Experience of implementing high-speed IO interface standards.
  • Use of the Synplify FPGA tool chain.
  • Knowledge/Experience of implementation of DDR memory sub-systems.
  • Programming languages such as: assembly language (ideally Arm assembler), higher-level (e.g. C), object-orientated (e.g. C++)
  • Use of a UNIX environment and shell programming/scripting in e.g. Tcl, Perl, Python etc.
  • Use of emulation systems to test pre-silicon designs.
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