Emulation (Palladium)

Job Description

• Knowledge of CPU microarchitectures
• Experience in deep submicron process technology nodes is strongly preferred
• Knowledge of library cells and optimizations from ARM, TSMC, and other high performance library vendors
• Solid understanding industry standard tools for FPGA and Emulation platforms
• FPGA and emulator flows and methodologies
• Verilog and SystemVerilog
• Emulator platforms (Cadence Palladium), platform bringup, digital design, verification, debugging, and waveform viewers
• Hardware emulators, such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs
• Vivado, Incisive/VCS, IXCOM, Design Compiler, Synplify, Verdi, or SimVision
• Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration
• Debugging system-level software
• Programming skills in C and C++
• Scripting in Python, Tcl, or Perl

Skills

• C
• C++
• Perl
• Tcl
• Python