Emulation Engineer

Job Description

• Create emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning, and routing tools.
• Define and document RTL changes required for emulation/FPGA.
• Develop hardware and software collaterals and integrate them with the emulation/FPGA model.
• Test and debug the emulation/FPGA model and collaterals.
• Define and develop new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre silicon and post Silicon functional validation as well as SW development/validation.
• Develop improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.
• Interface with and provide guidance to pre silicon Validation teams for optimizing pre Silicon validation environments, test suites, and methodologies for emulation efficiency.
• Develop and apply automation aids, flows, and scripts in support of emulation ease of use and improvement of equipment utilization.

Qualifications

B.Tech /M.Tech degree in Electrical Engineering, Electrical and communication Computer Science and:

• Should have 2-10 yrs of experience
• Experience in Verification planning
• Experience in Verification testcase development
• Experience in RTL code debug [Verilog preferred]
• Experience in Post Silicon debug support
• Programming skills: Python, C/C++, Perspec, Verilog
• Good multi-tasking skills
• Team-player, great communication skills

Preferred:

• Experience in Pre-Si power and performance correlation.
• Familiarity with System level emulation-based verification.
• Familiarity with Synopsys tools
• Familiarity with Post-Si Validation and debug support
• Familiarity with Assembly, System Verilog
• Programming exposure with virtual platforms
• Familiarity of Intel CPU architecture or x86 architecture in general
• Experience in emulation with Zebu or Haps, SLE environment