EDA Tools Software Engineer

Job Description

At Intel, Design Enablement (DE) is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies.

As part of the Design Enablement Process Design Kit PDK group you will join a highly motivated team of talented engineers solving challenging technical problems, enabling PDKs for Intel’s most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers. The job requires partnering and leveraging domain experts across various areas of Technology Development Electronic Design Automation EDA vendors and product design teams to deliver high quality parasitic extraction collaterals and validation of EDA tools.

As a Physical RC Extraction Engineer, you’ll be responsible but not limited to the following:

• Validate Process Design Kit PDK. Develops and tests Engineering Design Automation tools.
• Creates flows scripts to analyze and test design methodologies.
• Specifies materials equipment and supplies required for completion of projects.
• Evaluates vendor practical capabilities to provide required products or services.
• Responsible for designing deploying and testing efficiency of tools to utilize in achieving design goals and collaborating with design teams on methodology development.
• Physical RC Extraction Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality.

Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Requires:

• MS degree in Electrical Engineering, Computer Engineering, Material Sciences.
• 1+ years of industry/academic experience working with:
• Semiconductor Device Physics
• Synopsys StarRC, ICV OR Cadence Quantus (QRC) OR Siemens – Mentor Calibre
• Virtuoso Custom Layout

Preferred Qualifications:

• Synopsys HSPICE
• Python or Perl for Automation Validation
• Validation experience on semiconductor EDA tools and PDK