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Lead Design Engineer

Lead Design Engineer
by Daniel Nenni on 08-16-2020 at 4:15 pm

Website Cadence

Description:

Responsible for designing, developing, modifying and productizing hardware based verification products.

Perform as individual contributor on FPGA based design projects involving board design, RTL design, verification and documentation.

Work on complex problems related to FPGA design, protocol or system integration level issues, electrical or timing closure issues, RTL design or verification methodologies.

Create, maintain and track project schedules.

 

Requirements:

The position requires BSEE, or equivalent, with a minimum of 5 yrs of industry experience in designing hardware systems.

ust have excellent communication skills, both written and verbal.

Experience in project management for complex engineering projects is required.

 

Technical expertise in FPGA design for either Altera or Xilinx products is required.

Knowledgeable in FPGA design methodologies including high speed design, serial protocols and FPGA timing closure is strongly recommended.

In addition RTL design knowledge using Verilog is required along with experience in using RTL verification tools and flows.

Verification using with Cadence simulation products is desired.

Experience with High Level Verification languages, SystemVerilog, Specman E is desired. Experience with scripting languages like Perl, TCL C-shell are strongly recommended.

Experience with PCB tools is also desired.

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To view the job application please visit cadence.wd1.myworkdayjobs.com.