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Sr. Principal IC Design Verification Engineer

Sr. Principal IC Design Verification Engineer
by Daniel Nenni on 08-16-2020 at 4:49 pm

  • Full Time
  • Cary, NC

Website Cadence

Design Verification expert with good subsystem and SOC level verification. Must possess excellent debug skills. Expert in developing SV UVM based testbenches. Ability to coach and mentor less experience teammates. Should have worked on time-bounded projects leading to Si realization.


Must be able to obtain and maintain a Department of Defense classified clearance.


Independently handle verification of complex modules or own significant piece in subsystem / SOC based verification. Define methodology for subsystem/SOC verification. Mentor less experienced engineers to bring them up as independent verification engineer. Follow systematic approach of metric driven verification with meticulous attention to quality and completeness. Should be able work closely across teams to meet delivery timelines.


Strong vocabulary, communication, organizational, planning, and presentation skills are essential. Ability to work independently and productively with high quality output and results in a fast paced and dynamic environment. A strong positive attitude and ability to work in a team is a must. Self-motivated and willing take up additional responsibilities to contribute to team’s success.


Required experience

Worked on Subsystem / SOC level verification projects
Experience in ARM based designs.
In-depth knowledge SV-UVM
Expertise in architecting, design and development of scalable verification environments from scratch. Define verification architecture and verification strategy
Expertise in verification test plan development, test cases coding; Execute and debug test cases to achieve functional and code coverage goals
Experience in C based testcase development
Strong knowledge of AMBA protocols like AXI, ACE, APB, AHB.
Strong problem solving skills. Exhibit discipline, thoroughness and methodical approach in solving problems
Ability to work with stakeholders across cross-functional teams – Architecture, Design, Internal and External Customers
Experience in mentoring junior engineers
Self-driven and committed individual who can work in a fast paced project environment
Prior experience with Cadence tools and flows is highly desirable
Familiarity with ARM/CPU architectures is a plus
Experience in developing c-based test cases for SOC verification
Experience with assembly language programming
Good knowledge of some of the protocols like UART, I2C, SPI, JTAG
Embedded C code development and debug
Formal Verification experience
Cadence verification tool experience

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To view the job application please visit cadence.wd1.myworkdayjobs.com.