Website Alphawave Semi
What You’ll Do
- Deliver standards-compliant IP blocks for use in OTN / Ethernet / CXL / PCIE FPGAs or ASICs.
- Streamline ASIC development process with advancing tools/scripting.
- Micro-architect and document the design
- Develop design using Verilog
- Develop and execute individual test-cases against the RTL
- Issue and track bug reports from inception to closure
- Work with our external customers and/or internal engineers to verify, validate and deliver designs for use in OTN / Ethernet FPGAs or ASICs
What You’ll Need
- Reporting to the Senior Manager, we are are looking for BSc/BEng with 1+ years of experience in ASIC or FPGA development
- Telecommunications Protocol knowledge (OTN, Ethernet, CXL, PCIE etc)
- Solid experience with VHDL, Verilog and SystemVerilog
- Experience with FPGA compilation tools
- Experience with design and verification tools like Vivado/Quartus
- Experience in SystemVerilog
- Experience with Unix/Linux Shell scripting
- Experience with source code revisioning systems, SVN, CVS, RCS e.g.
It’d Be Amazing If You Had
- Experience in OTN / Ethernet transport systems
- Experience in CXL / PCIE
- Experience with Debugging Tools
- Experience with PERL, TCL, Python and C/C++ programming
“Hybrid work environment”
As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:
- Great compensation package
- Health Insurance
- Retirement Savings
- Paid time off
Apply for job
To view the job application please visit alphawave.wd10.myworkdayjobs.com.