Job Description and Requirements
The candidate will be a key member of the Synopsys DesignWare ARC Processor hardware team.
- Development of Verification Testbenches and automation
- Creation of tests – both directed and random
- Functional coverage model creation and report review, code coverage review
- Development of C- models
- Resolving mismatches between design and C-model
- Integration of third party and internal verification IP
- Regression management
- Review and improvement of verification test suites
- Bachelor’s degree in engineering is required as a minimum
- Desirable to have 1+ years of related experience
- Good Digital Design Knowledge is must
- Microprocessor architecture knowledge is a big plus
- Good written and verbal skills desired
Desired knowledge of Programming languages & tools:
- HDL and Verification languages: SystemVerilog, Verilog
- C, C++, assembly, Perl, makefile generation
- Design Simulators, eg VCS, Verdi etc.
Apply for job
To view the job application please visit sjobs.brassring.com.