Applications Engineer, I

Candidate should be  B.E/ME in  Electronics and Communication Engineering. Should have good understanding in Digital electronics. Candidate would be working as a part of Silicon Realiazation Groups Product Engineering Team mainly focusing on coverage validation.

Responsibility includes

• Planning and executing both unit level and block level validation of coverage component , run & debug the test failures, report analysis, regression management
• Improvement of verification test suites to qualify & Sign off our Verification Tool Releases.
• Collateral Improvement
• Automation of testcase creation using pythn/perl scripting to extend the coverage of test suites

Skills Required:

• Good knowledge on Coverage  knowledge would be preferred.
• Hands-on experience in simulation, front end verification is preferred.
• Preferred 1-2 years of experience .
• Good knowledge on  programming languages  System Verilog/Verilog/VHDL is must
• Knowledge on Perl/Python would be a big plus.
• Proficiency in functional verification, testcases creation, simulation using VCS or other simulators, debugging wing with Verdi, familiarity with scripting languages is plus.
• Good Communication skills are must