AI Verification Engineer
Website Flex Logix
Flex Logix is the leading provider of reconfigurable computing technology for both AI inference and eFPGA IP solutions. Our offerings push the leading edge of hardware, software and system design; pioneering new approaches to important problems.
- Our InferX X1 is the industry’s most-efficient AI edge inference accelerator that brings AI to the masses in high-volume applications by providing a new silicon efficient dynamic logic paradigm for inference processing. InferX achieves GPU-level inference performance with a fraction of the die area and memory footprint.
- Our EFLX embedded FPGA (eFPGA) IP enables any SOC design to flexibly handle changing protocols, standards, algorithms, and customer requirements and enables reconfigurable accelerators that speeds key workloads up to 1000x compared to a general purpose processor. EFLX eFPGA is available in a wide range of process technologies and supports designs ranging from low cost microcontrollers to 5G baseband processing solutions.
Flex Logix is looking for Verification Engineers to join our growing team. You will be involved in functional verification and emulation of Inference SoC and EFLX (embedded FPGA) cores in different process nodes.
Responsibilities
- Responsible for all aspects of verification and emulation.
- Integration of industry standard Verification IPs.
- Development and debug of UVM/SV testbenches for SoCs and TPU.
- Bring-up and integration verification of cores, NoC, LPDDR4X/5 memory, PCIe, USB, DFT subsystems.
- Development of verification testbench for silicon validation, post-silicon bring-up and checkout; Linux-based validation using C++/Python.
- Development of coverage plans and metrics, drive coverage activities and test writing.
- Gate-Level Simulation/UPF simulation and debug.
- Emulation of SoC and/or TPU using an industry standard emulation tool.
- Silicon On-tester pattern generation using standard IP functional features.
Requirements
- BSEE/MSEE with at least 5 years of relevant industry experience.
- Must be very smart and very motivated.
- Must have hands-on experience in VIP setup/integration of tools from Synopsys, Avery, SmartDV or similar.
- Must have hands-on experience with UVM/OVM.
- Must have hands-on experience in developing verification plans for SoC or ASIC architectures.
- Must have hands-on, test-writing experience with SIMD, RISCV or ARM ISA, AMBA, JTAG/DFT architectures.
- Must have hands-on functional coverage analysis and assertion implementation experience.
- Must have hands-on experience with standard functional simulators such as NCSIM or Questa.
Preferred Experience
- FPGA debug exposure.
- LPDDR4X/5, PCIe5/USB4 architecture.
- Emulation flow development in Mentor Graphics’ Veloce or equivalent emulation hardware.
- Exposure to Formal Verification techniques.
- Worked with and directed external contractors.
We are looking for passionate team members, to be part of an aggressive, venture-backed startup team that is changing chip architecture. Must be entrepreneurial, innovative problem solver, willing to work hard and have fun.
As we continue to grow and expand our company, we are hiring for all office locations. You must live near one of our main offices located in: Mountain View (CA), Austin (TX), Chicago (IL) or Vancouver (BC). We offer a flexible work schedule.
You must have US citizenship or permanent residency (“green card”) or hold a current H1-B visa to work in United States.
Flex Logix recruits, employs, trains, compensates and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.
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