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2020 Design for Test (DFT) Hardware Engineering Intern

2020 Design for Test (DFT) Hardware Engineering Intern
by Admin on 02-26-2020 at 1:14 pm

Job ID #: 18184
Job Category: Hardware Engineering
Employment Type: Graduates
Division: Technology Services Group
Department: Technology Services People
Primary Country: UK
Primary Location: Cambridge

Job Description

The DFT Methodology group  is responsible for defining DFT architecture and test methodology across all of ARM cores, ARM libraries and internal test chips. DFT group is also responsible for exploring and /or driving leading DFT technologies on ARM cores to enhance partner experience in DFT implementation. This often involves deploying existing DFT methodologies on ARM IPs while evaluating future technologies. We work closely with leading EDA vendors on evaluating cutting edge DFT technologies which are important to ARM partners. As a member of a small and dynamic team, you will be working alongside DFT experts and deploying defined DFT methodology on ARM IPs. You will also contribute to DFT methodology and flow development tasks and will have an opportunity to work with worldwide DFT group.

The activities for this role demand an enthusiastic candidate from either a Computer Science or Electrical/Electronics Engineering background with a strong desire to constantly evolve a cross-disciplinary skill set, in particular:

  • Building a detailed expertise in domain of DFT which includes ATPG, Compression, IJTAG and MBIST.
  • Working on DFT verification flows based on simulation and formal techniques.
  • Understanding implications of DFT on PPA and design.
  • Building software skills required for automating methodologies and flows.

You will play an essential role in deploying DFT methodologies across ARM IPs in UK and EU to meet DFT quality goals and enhance DFT verification methodology as a by-product of deployment.

Accountabilities include :

  • DFT tool and process automation software development and testing
  • MBIST verification using simulation and Formal methods
  • Generation of test patterns for current and future ARM cores
  • Simulation and debug of test patterns using a Verilog simulator
  • Work with EDA vendors on tool improvements
  • Document and train design teams in DFT methods created

Job Requirements

As a successful Intern, you will be flexible with a variety of software or hardware development skills and a commitment to extend the breadth and depth of your knowledge. You will have background in Computer Science or Electrical/Electronic Engineering from a good university, although candidates with other academic backgrounds would also be considered if they have the relevant skills. You will possess a research mindset that seeks to find and communicate the best answers to complex technical problems based on systematic investigation.

Essential Skills and Qualifications

  • Experience with Perl, Python, TCL, and/or C programming
  • Proficient in Unix/Linux environments
  • Knowledgeable in verification, synthesis, ATPG tools and debug
  • Definite plus to understand Design for Test elements such as scan, BIST, compression
  • Definite plus to understand Formal verification methods and system Verilog

Interpersonal Skills

  • Ability to learn quickly and work independently, as well as part of a team
  • Excellent problem solving skills
  • Ability to cooperate & communicate well
  • Motivated to  continuously develop skills and accept a variety of responsibilities as part of contributing to the design centre’s success
  • Demonstrated positive attitude and respect for all members of the team
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To view the job application please visit careers.peopleclick.com.

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