Intel Foundry Gathers Customers and Partners, Outlines Priorities (Intel Connect Live)

[nghanayem]

I thought they presented SALELE with one block mask. Actually, it is usually presented with two block masks, one for each of the two metal line sub-patterns.

I guess that explains 3 exposures then.

I suppose it depends what they count as a "step".

What would you count as a step? To me anytime you leave a tool for a different tool is a step.

 

[Daniel Nenni]

Daniel Nenni said:
It is interesting to note that Intel will have two versions of 14A, EUV and HNA-EUV.

This news is over a year old. Intel has mentioned that which one they use will depend on which one is better almost a half dozen times at this point. Parallel developments and derisking high risk items were two of the things Ann K said she changed about how Intel does development during interviews she has done over the years.

I do not recall that and I was at the previous event and was briefed by Ann K. Do you have a reference?

Here is a slide from last year:

 

[nghanayem]

Daniel Nenni said:
It is interesting to note that Intel will have two versions of 14A, EUV and HNA-EUV.



I do not recall that and I was at the previous event and was briefed by Ann K. Do you have a reference?

Here is a slide from last year:

View attachment 3121

They have mentioned it on earnings a couple of times when folks were concerned about risk. I think when Ian Curtis interviewed Pat last year Pat mention it. I think Intel discussed it at last SPIE. Lastly they also showed off a completed 14A wafer with test chips last direct connect (which was like 1-2 weeks after Intel got first light on their first tool). It would be impossible for that wafer to be made with highNA proving without a shadow of a doubt there was always a low NA version. After all kind of hard to develop a process without the tools to make it.

 

[MKWVentures]

Daniel Nenni said:
It is interesting to note that Intel will have two versions of 14A, EUV and HNA-EUV.



I do not recall that and I was at the previous event and was briefed by Ann K. Do you have a reference?

Here is a slide from last year:

View attachment 3121

Good input Dan.

there are some great archive documents of what Intel presented. https://newsroom.intel.com/new-technologies/intel-newsroom-archive-2022 (and any other year).

High-NA was hinted at for 18A originally. Then 14A. We will see what actually happens. As Intel Re-orgs all its groups, things will change more.

 

[Daniel Nenni]

They have mentioned it on earnings a couple of times when folks were concerned about risk. I think when Ian Curtis interviewed Pat last year Pat mention it. I think Intel discussed it at last SPIE. Lastly they also showed off a completed 14A wafer with test chips last direct connect (which was like 1-2 weeks after Intel got first light on their first tool). It would be impossible for that wafer to be made with highNA proving without a shadow of a doubt there was always a low NA version. After all kind of hard to develop a process without the tools to make it.

Okay, I heard differently. My take is that Pat Gelsinger wanted to be first on HNA-EUV and he bit off more than he can chew, but that was the original plan, 14A would be HNA-EUV. Intel Fab 62 and 56 in AZ are both HNA-EUV capable. It is a bigger footprint than EUV.

I know Intel has HNA-EUV testing with 18A in OR so maybe those are the wafers we see. There was a display case with wafers at the Intel event but we were not allowed to take pictures or even get too close. There was a security guard chasing people away.

I do know that TSMC has a superior proprietary EUV methodology to what Intel and Samsung have so HNA-EUV will have to improve quite a bit before TSMC uses it for HVM.

 

[MKWVentures]

Okay, I heard differently. My take is that Pat Gelsinger wanted to be first on HNA-EUV and he bit off more than he can chew, but that was the original plan, 14A would be HNA-EUV. Intel Fab 62 and 56 in AZ are both HNA-EUV capable. It is a bigger footprint than EUV.

I know Intel has HNA-EUV testing with 18A in OR so maybe those are the wafers we see. There was a display case with wafers at the Intel event but we were not allowed to take pictures or even get too close. There was a security guard chasing people away.

I do know that TSMC has a superior proprietary EUV methodology to what Intel and Samsung have so HNA-EUV will have to improve quite a bit before TSMC uses it for HVM.

I tell people that 'High NA is not going to win the war'.

For some reason, it was a huge PR effort for Intel with Social media pics on tool delivery like a IG pic of me at a Vegas concert, LOL. [ BTW look for that this weekend!]

I think Both TSMC and Intel will cut it in when it makes the most sense for them. I believe @nghanayem bluntly corrected me when I said High-NA will fit in Arizona Fabs one way or the other.... I got that from Intel Arizona team. Is that true or not?

 

[Daniel Nenni]

I tell people that 'High NA is not going to win the war'.

For some reason, it was a huge PR effort for Intel with Social media pics on tool delivery like a IG pic of me at a Vegas concert, LOL. [ BTW look for that this weekend!]

I think Both TSMC and Intel will cut it in when it makes the most sense for them. I believe @nghanayem bluntly corrected me when I said High-NA will fit in Arizona Fabs one way or the other.... I got that from Intel Arizona team. Is that true or not?

The new AZ Intel fabs will accommodate HNA-EUV. I confirmed this with Intel. But I doubt HNA-EUV will be in true HVM anytime soon. EUV was very late and it cost Intel dearly. I would hate to see that happen again.

As I mentioned before, the semiconductor industry is very ego driven, Intel probably started it all years ago. Being the first, being the best, blah blah blah. For the foundry business customers determine who is the best. TSMC N3 won by a landslide. TSMC N2 will win by a landslide. It is hard to see TSMC not winning by a landslide at future nodes no matter what Intel Foundry, Samsung Foundry, or Rapidus does. The ecosystem momentum is just too strong. A single digit lead in PPA or being first to anything will just not do it, my opinion.

The good news is that Lip-BU knows this and he will change Intel, absolutely.