Perforce Webinar: Can You Trust GenAI for Your Next Chip Design?

GenAI is certainly changing the world. Every day there are new innovations in the use of highly trained models to do things that seemed impossible just a short while ago. As GenAI models take on more tasks that used to be the work of humans, there is always a nagging concern about accuracy and bias. Was the data used to train the model correct?  Do we know where it all came from, and can the sources be trusted? In chip design, these concerns are certainly there as well. Errors introduced this way can be hard to find and extremely expensive to fix. If you’re not worried about this, you should be.

Perforce will hold a webinar on September 10 that deals with this class of problem in a predictable and straight-forward way. You can register for the webinar here. Here is a preview of some of the topics that will be addressed in the Perforce Webinar to answer the question – can you trust GenAI for your next chip design?

The Webinar Presenter

Vishal Moondhra is the VP of Solutions Engineering at Perforce IPLM. He brings over 20 years of experience in digital design and verification.  Vishal brings the right skillset and perspective to the webinar. He is a recognized expert in his field and often speaks on current challenges in semiconductor design.

His experience in engineering and senior management includes innovative startups like LGT and Montalvo and large multi-national corporations such as Intel and Sun. In 2008, Vishal co-founded Missing Link Tools, which built the industry’s first comprehensive design verification management solution, bringing together all aspects of verification management into a single platform. Missing Link was acquired by Methodics in 2012 and Methodics was acquired by Perforce in 2020.

Topics to be Covered

Vishal begins by framing the problem. What are the unique challenges and risks associated with using GenAI in the semiconductor industry? And how do these risks compare to software development? There are four areas he sets up for further investigation. They are:

• Liability: Sensitivity around ownership and/or licensing of data used for training
• Lack of Traceability: Challenges in tracing exactly how a model was trained
• High Stakes: Extremely high cost of errors & impact on production timelines
• Data Quality Concerns: Mixing external IP with internal, fully vetted datasets

A lot of the discussion that follows focuses on design flows and provenance. We all know what a design flow is, but to be clear, here is a definition of provenance:

The history of the ownership of an object, especially when documented or authenticated.

So, a key point in trusting GenAI for chip design is trusting the GenAI models. And trusting those models means knowing how the models were trained, and what data was used for that training. More broadly, having a full picture of the provenance of all the IP and training data that goes into your design. The problem space is actually larger than this. The figure below provides a more comprehensive view of all the information that must be tracked and managed to achieve the required level of trust for all aspects of the design.

Vishal discusses some of the elements required to achieve trust in using AI to train internal models. These items include:

• Clear and auditable data provenance for all training datasets
• Complete traceability of all IPs and IP versions
• Secure and compliant use of both internal and external IP
• Enhance trust in AI adoption using highly sensitive IP

Vishal then details the processes required to setup an AI training/machine learning pipeline. He also provides details about how Perforce IPLM can be used to implement a comprehensive system to track and validate all aspects of a design to achieve a level of trust and confidence that will provide the margin of victory for any complex design project.

To Learn More

Chip design has become far more complex. It’s not just the design complexity and that all-important “right first time” mandate. It now also includes massive IP and supporting data from a worldwide supply chain. Increasing reliance on GenAI models to accelerate the whole process brings in the additional requirements to examine how those models are trained and what data was used in the process.

All of this is important to understand and manage. This webinar from Perforce provides significant details about how to set up the needed processes and how to use the information effectively. I highly recommend you register to attend. The event will be broadcast on Wednesday, September 10 at 1:00 p.m. EDT. You can register here. Save your seat for the Perforce webinar where you will find out how you can trust GenAI for your next chip design.