Webinar: Your Chip Works. Prove It Is Secure.
Tuesday, November 10, 2026
8:00am PST | 11:00am EST | 17:00 CET
Functional verification establishes that a chip performs its intended functions. Hardware security assurance, however, addresses a different set of questions: Can sensitive information reach unauthorized destinations? Can protected state be modified unexpectedly? Do security boundaries remain intact as the design operates?
Join this 30-Minute BitCast as our expert demonstrates how information flow tracking follows security-sensitive assets during existing simulation or emulation runs. You’ll learn how this approach provides a practical path to systematic pre-silicon security verification, helping teams identify unintended information flows and generate measurable evidence to support security sign-off.
Attendees will learn:
- Why functional correctness alone does not guarantee security assurance
- Key concepts for defining assets, security requirements, and protection boundaries
- Ways information flow tracking reveals unintended movement of sensitive assets through a design
- Where information flow tracking fits within broader functional and formal verification strategies
- Methods for producing measurable security evidence to support sign-off
Not sure if you will be able to attend? No problem! All registrants will receive a link to watch the presentation on-demand after the live event.
Speakers:
Leon Brown
Director of Marketing, Cybersecurity, Arteris
Leon Brown has spent more than a decade in cybersecurity, spanning identity, public key infrastructure, quantum security, and post-quantum cryptography. He is Director of Marketing, Cybersecurity at Arteris, focused on hardware security assurance.
Pete Mar
Staff Field Security Applications Engineer, Arteris
Pete is a Staff Field Security Applications Engineer at Arteris with deep expertise in hardware security verification, proficiency in FPGA and ASIC synthesis and pre-silicon verification with industry-standard emulation and multi-FPGA prototyping platforms. Since 2020, he has led the deployment of Cycuity Radix at major semiconductor companies. Previously at Synopsys, he was technical lead for HAPS hardware deployments and the ProtoLink debug solution.
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