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Synopsys
Posted on by Daniel Payne

Drift is a Bad Thing for SPICE Circuit Simulators

Drift is a Bad Thing for SPICE Circuit Simulators
by Daniel Payne on 10-07-2016 at 12:00 pm
Categories: EDA, Synopsys

My first job out of college was with Intel, located in Aloha, Oregon and I did circuit simulations using a proprietary SPICE circuit simulator called ASPEC that was maintained in-house. While doing some circuit simulations one day I noticed that an internal node in one of my circuits was gradually getting higher and higher, even exceeding the value of VDD. What in the world could be causing this, the voltage cannot climb higher than VDD, I thought. Finding a senior engineer Clair Webb, I showed him the plot and asked, “What did I do wrong?”

His reply, “Oh, your circuit is OK, it’s the circuit simulator that has a bug. Go file a bug report.” Wow, I was stunned, because I presumed that in the commercial world there were no software bugs and that the SPICE answers were always to be trusted. Have times changed that much with circuit simulators producing the wrong results?

If you’re doing signal and power integrity designs then there are extracted interconnect netlists that are part of your circuit, and it’s possible that you can see DC drift on signals during transient analysis. The HSPICE team over at Synopsys has anticipated that you might experience this drift issue, so they’ve created a 15 minute Webisode titled, “Drift-free Transient Simulation for Signal and Power Integrity Analysis – Using deCap-aware Rational Functions.”

The R&D engineer at Synopsys explaining how to best use HSPICE in this webisode is Ted Mido. He talks about a new feature in HSPICE on scattering parameter handling that will make sure that your transient circuit simulations are drift-free. The example circuit used is an 8 GBps differential PRBS simulation. You can even get this complete demo case at no cost by requesting it.

The online signup is here and taking up just a quarter of an hour learning more about HSPICE will certainly save you from getting the wrong analysis results for SI and PI simulations. Mido-san talks about topics like:

  • Small extracted capacitances in the range of nF and pF for transient results at GHz speeds
  • Larger extracted capacitance for decoupling capacitors in packaging with capacitance values in the mF range for transient results in KHz speeds
  • S-parameters with a very wide range of values
  • How convolution is used when starting from S-parameters and going to transient analysis
  • Inverse FFT or rational function modeling for approximation
  • Recursive convolution
  • Computation effort versus run times
  • Separate sets of S-parameters for packaging and chip interconnect
  • HSPICE automatically detecting and separating S-parameters for coupling decap and chip interconnects
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