LUBIS EDA at the 2025 Design Automation Conference #62DAC

At the Design Automation Conference (DAC) 2025 in San Francisco, LUBIS EDA returns as an exhibitor to showcase its latest innovations in formal verification automation, helping semiconductor teams move faster and with more confidence through the most complex verification challenges.

LUBIS EDA is a fast-growing EDA startup based in Germany, dedicated to unlocking the full potential of Formal Verification (FV). We work with leading semiconductor companies worldwide — from semiconductor heavyweights, AI chip startups to established IP vendors — helping them prove correctness for their most mission-critical IP.

Our team consists of experts in formal methods, tool automation and leadership, and we’re known for combining high-performance consulting with user-friendly EDA software. If you’ve ever hit a wall in your verification project and wished FV was easier, faster, or more scalable — come talk to us.

✅ Turnkey formal sign-off services

Getting formal verification right is hard — and scaling it across multiple projects is even harder. That’s why LUBIS EDA offers Turnkey Formal Sign-Off Services for companies who want to accelerate time-to-coverage closure without building a full in-house FV team.

We provide a complete formal sign-off flow tailored to your RTL and verification goals: from property definition to coverage analysis and documentation. Our engineers bring battle-tested Assertion IP and domain expertise across AI, data center, processor and other designs.

Customers using our turnkey services report:

• Effort reduction in reaching formal closure and coverage goals
• Rapid ramp-up for critical blocks (caches, interconnects, decoders, etc.)
• Confidence in verification completeness with formal checklists and traceable requirements

At DAC, you’ll get a firsthand look at how our process works and how it helps teams avoid costly late-stage bugs.

✅ ReCheck – Regression management tailored for Formal Verification

Formal Verification teams often struggle to keep pace with design changes and tool license limitations. Their usually tasked to integrate their assertion into existing UVM regression runs. ReCheck is our response: a smart regression engine built specifically for formal, supporting scenario-based debugging, incremental runs, and coverage tracking.

With ReCheck, teams can cut the risk of rework late in the project, while staying lean on manual efforts. We’ll be demoing ReCheck in live sessions at our booth and sharing lessons learned from deploying it in production.

✅ AppBuilder – Generation framework for Assertion IP

Formal doesn’t scale without automation. AppBuilder is our development framework to help engineering teams build Assertion IP (AIP) systematically, bind their AIP, and integrate with your existing EDA tools and CI pipelines. Whether you’re a startup building your first IP or a seasoned team formalizing an SoC, AppBuilder makes AIP development predictable and repeatable.

Booth #2620

• See live demos of ReCheck and AppBuilder
• Learn from real customer case studies in AI and data center chips
• Discover how to accelerate your verification plans
• Meet our Founders and formal engineers

Whether you’re just getting started with formal or trying to bring structure to your advanced flows:

Let’s Connect

We’re excited to meet you at DAC 2025!

Contact LUBIS EDA

Also Read:

CEO Interview: Tobias Ludwig of LUBIS EDA

Automating Formal Verification