In college many of us dreamed of starting up our own company by offering something new that has never been done before. Today I spoke by phone with Yunshan Zhuin Shanghai, and he has actually lived out this scenario by founding NextOp in 2006, then getting that company acquired by Atrentain 2012. The new capability that NextOp created was something called assertion synthesis, and the product name is BugScope.
Q&A
Q: I see that you went to school in Taiwan, then earned a PhD at North Carolina. What was your thesis?
My PhD thesis at North Carolina was on logic deduction, an efficient way to see if a logic formula is implied by other formulas. It has implementations in AI, verification, plus formal tests in HW and SW.
Q: How did you startup NextOp as a company?
During my last year of PhD work I was at Carnegie Melon, then started working on a formal verification method called model checking. I met two good friends at CMU, and we kept in touch. I first went to Synopsys and worked on formal verification tools, then I decided to co-found NextOp with my CMU friends.
Q: What was the goal of starting NextOp?
Manually writing assertions was just too difficult and very time consuming for engineers, so that was our focus at NextOp, to automate assertions. It took about three years to refine our ideas and get a product into early customer hands by 2009. We had about 20 people at NextOp when it was acquired by Atrenta in 2012.
Q: What technology trends were going on during your time at NextOp?
Well, SVA – System Verilog Assertions came into being in 2005, so the timing was good for our automated assertion tool, BugScope.
PSL – the Property Specification Language, also started around 2004.Related: Making IP Reuse and SoC Integration Easier
Q: What did you learn about startup companies?
My background was really R&D at NextOp, so I needed to learn how to lead a sales team, then selling the company to Atrenta. I had to answer questions like, “What does the customer really want, and how can I develop something that helps them?”
Q: What is your role today at Atrenta?
I lead the BugScope product team to solve new problems, so I work closely with the R&D team to define our development process, our quality, and next generation products. I also talk with marketing to specify our next generation product.
Q: Where is the BugScope product developed?
Our R&D is in Shanghai mostly, and a few people are in San Jose. The US customers are still the leading adopters for our tools. We’ve seen a similar development culture at both NextOp and Atrenta.
My boss is Ajoy Bose the Chairman, President and CEO of Atrenta. Ajoy has a good grasp of SW development. We still do monthly releases to keep nimble, responsive and add new features. Customers wait for our stable releases.
Q: Who are BugScope competitors?
At first there were no competitors to BugScope, then we began to see competition from the EDA big three.
Q: Why should an engineer evaluate BugScope versus other tools for assertion synthesis?
One thing is the core engine, and the quality of results from assertion synthesis. If your algorithm is weak then you generate too many assertions that are not really necessary, and just slow down your functional simulator.
Another focus that we have is on the IP and SoC sign-off flow called MARS: Methodology for Assertion Reuse in SoC.
A chip designer can write manual assertions, then compare them versus an automated assertion synthesis tool as a QOR comparison. You can manually writing maybe 1-2 assertions per hour, where a tool can be 10-100X faster than manual, so that’s a huge time savings.
Does the assertion run efficiently in a simulator, or slowly? Keeping the overhead low is a good QOR.
With an emulator, the issue is to keep assertions that take up low capacity for best QOR.
Does the assertion help you find a new bug?
Is the assertion redundant?
Q: Who would benefit from using BugScope?
The SoC verification engineer gets the most benefit from a tool like BugScope. These verification engineers are under tremendous pressure to integrate and verify all of these IP blocks quickly together. During SoC integration each IP that is added may have never been used together like this before. At the IP level you should be using assertion synthesis, then during integration you add the assertions for each IP block to provide the greatest visibility.
Assertions can also be added to your emulation box during integration.
Q: What are the future plans for BugScope?
The direction is to make the product even easier to use and learn for engineers. Continual improvements for: capacity, speed, QOR, new features, new properties.
Q: Is BugScope a text-based or GUI tool?
It’s really a combination of both command line and GUI, depending on what you are trying to do. You can inspect the progress of verification using a GUI.
Q: Does your group write papers for technical conferences?
Yes, as an example at 2014 DAC we presented and received a Best Paper Award for DAC User Track with TI. We publish papers about once per year or so.
Q: What is success for BugScope team 12 months from now?
Looking at our customer base we are already in the major accounts, so the next step is to get proliferation. We can do that by simplifying the use model, and making it easier for more teams to learn and use the technology.
Upcoming Webinars:
- Reduce Your Design Risk By Enabling a Comprehensive Signoff Flow for Timing Constraints
- Physical Lint: Fast RTL Analysis that Identifies Logic Structures Known to Negatively Impact Design Convergence
- IP Signoff
- Powerful and Easy to Use RTL Restructuring
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