Ajoy Bose and Hogan: SoC Realization

Tomorrow night in Sunnyvale at the National Institute of Technology Alumni meeting, Ajoy Bose and Jim Hogan will talk about different aspects of SoC Realization. I’ve been saying for some time that design is changing and the block level is really where the action is. That is the right level to put together a virtual platform so that the software can be developed, and it is increasing the level at which chips are put together. Increasingly a chip is an assembly of blocks of IP and that assembly process is known as SoC Realization.

Ajoy Bose will talk about how SoC Realization is where high-level concepts are refined to implementation readiness. Legacy and third-party IP blocks are chosen and integrated and the overall chip is prepared for back-end implementation. Getting it right at this stage will dramatically reduce implementation challenges and iteration times. “getting it right” during SoC Realization could lead to the creation of new markets and renewed growth for the industry, but first completing the flow and implementing the vision will require the collaboration of many.

Jim Hogan will talk about Making Money from SoC Realization. Jim wants to focus his EDA investments over the next 5 years in SoC Realization. Part of SoC Realization is validating IP quality and functionality, design assembly and IP integration, design data management, power, performance, and area feasibility checks, debug and analysis tools, memory and memory controllers and bare metal software development.

Increasingly chips are designed using IP and software and the methodologies need to change to adapt to this. There is still often an unspoken assumption that chips are designed by creating a lot of RTL and then running it through synthesis, place and route etc but the reality is that most of the design is re-use of existing IP and software customization.

Look at something like Apple’s A5 chip. Most of the area is a dual ARM core and a quad-core Imagination GPU. Yes, I’m sure there is a little Apple secret sauce in there but primarily large IP blocks being hooked together.

Details on the meeting are here. I’m pretty sure you don’t have to be an alumnus/a from NIT India to attend.