Software defined vehicles (SDVs) are transforming the automotive industry. Today’s vehicles are connected computing platforms that rely on advanced processors, artificial intelligence (AI), over the air (OTA) software updates, cloud services, and vehicle to everything (V2X) communications. Every electronic … Read More
The Architecture of Success: Why a Unified Semiconductor IP Strategy Is the Foundation of Modern SoC Design
As architects push toward advanced nodes and increasingly demanding workloads, modern silicon design has entered an era of unprecedented complexity. A single design respin can cost millions of dollars and delay market entry. Against this backdrop, designs must be balanced for performance, bandwidth, power efficiency, security… Read More
Podcast EP351: A Detailed Overview of the Emerging Standards for 400G with Kent Lusted
Daniel is joined by Kent Lusted, a Distinguished Architect at Synopsys and an integral part of the company’s Ethernet IP design team. He has been an active contributor and member of the IEEE 802.3 Ethernet PHY standards development leadership team for more than 15 years. Prior to Synopsys, Kent worked at Intel for 30+ years, focused… Read More
Customized Foundation IP Enables the Next Generation of Automotive Compute
As vehicles become increasingly software-defined, automotive semiconductor suppliers face growing pressure to deliver higher compute performance while maintaining strict requirements for power efficiency, reliability, and long-term product support. Advanced driver assistance systems (ADAS), electrification, … Read More
Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools
As advanced packaging becomes a critical enabler for next-generation semiconductor products, Intel continues to drive innovation through its Embedded Multi-die Interconnect Bridge (EMIB) technology. EMIB has emerged as a foundational packaging solution for heterogeneous integration, allowing multiple chiplets and… Read More
SRAM compilers targeting automotive SoCs on advanced nodes
Processor IP garners the most attention in SoC design, but it’s not the only IP category begging for smart choices. Every processor core needs to be fed with data; however, frequent off-chip DRAM access incurs a large clock-cycle penalty each time. Architects now want SRAM blocks distributed throughout an SoC, putting data close… Read More
Synopsys and TSMC Deepen AI Design Alliance: What It Means
A recent announcement from Synopsys signals a meaningful escalation in the race to build next-generation AI hardware. The expanded collaboration between Synopsys and TSMC brings together silicon-proven IP, AI-driven design tools, and cutting-edge manufacturing processes in a tightly integrated effort to accelerate high-performance… Read More
Podcast EP342: The Evolution and Impact of Physical AI with Hezi Saar
Daniel is joined by Hezi Saar, Executive Director of Product Marketing at Synopsys, Hezi is responsible for the mobile, automotive, and consumer IP product lines. He brings more than 20 years of experience in the semiconductor and embedded systems industries.
Dan explores the growing field of physical AI with Hezi, who explains… Read More
Podcast EP337: The Importance of Network Communications to Enable AI Workloads with Abhinav Kothiala
Daniel is joined by Abhinav Kothiala, a principal product manager for the Synopsys Ethernet IP portfolio. He has over 12 years of experience across engineering and product management, spanning SoC design, functional verification, and building wireless connectivity platforms and IoT products. He also holds two patents in… Read More
Synopsys Advances Hardware Assisted Verification for the AI Era
At the 2026 Synopsys Converge Event, Synopsys announced a broad set of new products and platform upgrades, with its hardware-assisted verification (HAV) announcement emerging as a key highlight within that lineup. A key aspect of this announcement was moving beyond a hardware centric model to a more scalable, programmable … Read More

