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Semiconductor Intellectual Property
This webinar will introduce Time-Sensitive Networking (TSN) and unveil how TSN can provide value in aviation, aerospace and defence.
TSN is a new set of standard extensions based on the IEEE 802.1 and IEEE 802.3 Ethernet standards. It is designed to provide deterministic guarantees on Quality of Service (QoS) metrics and reliability… Read More
RISC-V presents a unique opportunity for designers to extend the microarchitecture with custom instructions. One possible application is digital signal filtering using finite impulse response (FIR) or median filters, potential algorithms for carrier demodulation schemes in communications systems like 5G. Codasip application… Read More
It is tempting to think that everything GPT-related is just chasing the publicity bandwagon and that articles on the topic, especially with evidently impossible claims (as in this case), are simply clickbait. In fact, there are practical reasons for hosting at least a subset of these large language models (LLMs) on edge devices… Read More
We have shown in the “Design IP Report” 2022 that the market share of the wired Interface IP category is a growing part of the total IP, and that this trend is confirmed year after year. The interface IP category has moved from 18% share in 2017 to 25% in 2022.
During the 2010-decade, smartphone was the strong driver for the IP industry,… Read More
If you’ve designed a chip with analog content (and who hasn’t), you know Analog Bits. Along the way, you likely met Mahesh. If you are a lover of fine wines, you probably know Mahesh quite well. More on that later. I got the opportunity to speak with him recently about what he’s been up to, both now and over the past few years. It’s a story… Read More
RISC-V as an Instruction Set Architecture (ISA) has grown quickly in commercial importance and relevance since its release to the open community in 2015, attracting many IP vendors that now provide a variety of RTL cores. Roger Espasa, CEO and Founder of Semidynamics, has presented at RISC-V events on how their IP is customized… Read More
Arm just revealed at HotChips their compute subsystems (CSS) direction led by CSS N2. The intent behind CSS is to provide pre-integrated, optimized and validated subsystems to accelerate time to market for infrastructure system builders. Think HPC servers, wireless infrastructure, big edge systems for industry, city, enterprise… Read More
Ethernet’s continual adaptation to meet the demands of a data-rich, interconnected world can be credited to the two axes along which its evolution has been propelled. The first axis emphasizes Ethernet’s role in enabling precise and reliable control over interconnected systems. As industries embrace automation… Read More
Using Bluetooth for positioning is a topic I have touched on before, for location services, keyless entry, and asset tracking among other applications. Earlier implementations depended on measures of received signal strength and angle-of-arrival / angle-of-departure, but these have limited accuracy in environments with… Read More
Dan is joined by Stephen Fairbanks, CEO of Certus Semiconductor. Stephen is an ESD pioneer with over 30 years of experience starting with his time at Intel, SRF Technologies, and now Certus Semiconductor.
Stephen describes the varied challenges of ESD andI/O library design presented by today’s technologies and design… Read More
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Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing