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Daniel is joined by Mahesh Tirupattur, chief executive officer at Analog Bits. Mahesh leads strategic planning to develop and implement Analog Bits’ vision and mission of enabling the silicon digital world with interfacing IP to the analog world. Additionally, Mahesh oversees all aspects of Analog Bits’ operations to ensure… Read More
In a resounding affirmation of innovation in semiconductor intellectual property (IP), Ceva, Inc. (NASDAQ: CEVA) has been honored with the prestigious “Best IP/Processor of the Year” award at the 2025 EE Awards Asia, held in Taipei on December 4. The accolade went to the Ceva-XC21, a groundbreaking vector digital… Read More
As AI and HPC systems scale to thousands of CPUs, GPUs, and accelerators, interconnect performance increasingly determines end-to-end efficiency. Training and inference pipelines rely on low-latency coordination, high-bandwidth memory transfers, and rapid communication across heterogeneous devices. With model sizes… Read More
For decades, semiconductor teams have relied on traditional methods such as corner-based analysis, surrogate monitors, and population-level statistical screening for post-silicon validation. These methods served well when variability was modest, and timing paths behaved predictably. However, today’s advanced nodes… Read More
In the ultra competitive automotive technology race the integration of advanced connectivity is no longer a luxury but a necessity. As vehicles transition from isolated machines to intelligent nodes in a vast ecosystem, seamless, reliable communication becomes paramount. On November 11, 2025, Ceva, Inc., a leading licensor… Read More
Daniel is joined by Chris Morrison, vice president of product marketing at Agile Analog, the customizable analog IP company. Chris has over 18 years’ experience developing strong relationships with key partners across the semiconductor industry and delivering innovative analog, digital, power management and audio products.… Read More
The explosive growth of AI and accelerated computing is placing unprecedented demands on system-on-chip (SoC) design. Modern AI workloads require extremely high bandwidth, ultra-low latency, and energy-efficient data movement across increasingly heterogeneous architectures. As SoCs scale to incorporate clusters of… Read More
It was very clear at the recent 2025 TSMC OIP Ecosystem Forum that the semiconductor I/O landscape has undergone a profound transformation over the past 25 years, evolving from simple general-purpose input/output (GPIO) cells in 180nm nodes to highly complex, multi-protocol, feature-rich libraries in advanced 16nm and 22nm… Read More
Mixel, Inc., a longtime leader in mixed-signal and MIPI® interface IP, entered a new chapter in its history following its acquisition by Silvaco Group, Inc., a global provider of design software and semiconductor IP. The acquisition, completed earlier in 2025, marks a strategic move that combines Silvaco’s deep expertise in… Read More
There is always a lot of buzz about advanced AI workloads at trade shows. How to train them and how to run them. Advanced chip and multi-die designs are how AI is brought to life, so it was a perfect fit for discussion at a show. But there is another side of this discussion. Much of the work going on in AI workloads has to do with processing… Read More
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