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Functional safety has been at the forefront of the electrification of our vehicles with new ADAS features, and the push to reach autonomous driving, while having compliance with the ISO 26262 functional safety standard. I attended the Accellera hosted panel discussion on Monday at DAC, hearing from functional safety panelists… Read More
Standard Cell Scaling
Complex logic designs are built up from standard cells, in order to continue to scale logic we need to continually shrink the size of standard cells.
Figure 1 illustrates the dimensions of a standard cell.
Figure 1. Standard Cell Dimensions.
From figure 1 we can see that shrinking standard cell sizes requires… Read More
Monday at DAC this year started off on a very optimistic note as Joe Sawicki from Siemens EDA presented in the Pavilion on the topic of Digitalization, a frequent theme in the popular press because of the whole Work From Home transition that we’ve gone through during the pandemic. Several industries are benefiting from the… Read More
Thermal modeling has become a hot topic for designers of today’s high-speed circuits and complex packages. This has led to the adoption of better and more sophisticated thermal modeling tools and flows as exemplified in this presentation by Micron at the IDEAS Digital Forum. The presentation is titled “Thermal Aware Memory Controller… Read More
One of the sessions at the Linley Fall Processor Conference 2021 was the SoC Design session. With a horizontal focus, it included presentations of interest to a variety of different market applications. The talk by Mo Faisal, CEO of Movellus, caught my attention as it promises to solve a chronic issue relating to synchronizing … Read More
System on chip (SoC) based design has long been recognized as a powerful method to offer product differentiation through higher performance and expanded functionality. Yet, it comes with a number of limitations, such as high cost of development. Also, SoCs are monolithic, which can inhibit rapid adaptation in the face of changing… Read More
Ever increasing data handling demands make creating hardware for many applications extremely difficult. In an upcoming webinar Achronix, a leading supplier of FPGA’s, talks about the data handling requirements for AI/ML applications – which are growing at perhaps one of the highest rates of all. Just looking at all data… Read More
My beautiful first mate and I will be together at DAC this year. Her first DAC was 1985 in Las Vegas and we lived happily ever after. SemiWiki bloggers Tom Dillinger and Daniel Payne will also be at DAC attending sessions and meeting with exhibiting companies to learn and blog about the latest innovations inside the semiconductor … Read More
No matter how impressive the specifications are for an SoC, the power performance and area of the finished design all depend on the IP selected for the IO blocks. In particular, most SOCs designed for consumer and enterprise applications rely heavily on PCI Express. Because PCIe analog IP is critical to design success, Samsung … Read More
Ansys and Microsoft collaborated extensively over the past year to optimize and test Ansys’ signoff multiphysics simulation tools on the Azure cloud. Microsoft has invited Ansys to present the joint results in Azure’s DAC booth theater in San Francisco this year.
Two presentations are planned: covering the enablement of Ansys… Read More
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Facing the Quantum Nature of EUV Lithography