SiC Forum2025 8 Static v3
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Teradyne and TSMC: Pioneering the Future of Semiconductor Testing Through the 2025 OIP Partner of the Year Award

Teradyne and TSMC: Pioneering the Future of Semiconductor Testing Through the 2025 OIP Partner of the Year Award
by Daniel Nenni on 10-06-2025 at 10:00 am

TSMC 3D Fabric Packaging TSMC OIP 2025

In a significant milestone for the semiconductor industry, Teradyne was honored as the 2025 TSMC Open Innovation Platform® Partner of the Year for TSMC 3DFabric® Testing. This award, announced on September 25, 2025, underscores the deep collaboration between Teradyne, a leader in automated test equipment and robotics, and… Read More


Sofics’ ESD Innovations Power AI and Radiation-Hardened Breakthroughs on TSMC Platforms

Sofics’ ESD Innovations Power AI and Radiation-Hardened Breakthroughs on TSMC Platforms
by Daniel Nenni on 10-06-2025 at 6:00 am

Sofics TSMC OIP 2025 SemiWiki

In the fast-evolving semiconductor landscape, electrostatic discharge (ESD) protection is pivotal for ensuring chip reliability amid shrinking nodes and extreme applications. Sofics, a Belgian IP provider specializing in ESD solutions for ICs, has cemented its leadership through strategic collaborations showcased … Read More


Synopsys and TSMC Unite to Power the Future of AI and Multi-Die Innovation

Synopsys and TSMC Unite to Power the Future of AI and Multi-Die Innovation
by Daniel Nenni on 10-01-2025 at 10:00 am

UNDER EMBARGO 1PM PT Sept 24 Synopsys TSMC OIP 2025 (1)

In a rapidly evolving semiconductor landscape, where AI demands unprecedented computational power and efficiency, Synopsys has deepened its partnership with TSMC to pioneer advancements in AI-driven designs and multi-die systems. Announced during the TSMC OIP Ecosystem Summit last week, this collaboration leverages … Read More


Revolutionizing AI Infrastructure: Alchip and Ayar Labs’ Co-Packaged Optics Breakthrough at TSMC OIP 2025

Revolutionizing AI Infrastructure: Alchip and Ayar Labs’ Co-Packaged Optics Breakthrough at TSMC OIP 2025
by Daniel Nenni on 10-01-2025 at 6:00 am

Alchip TSMC OIP 2025

In the relentless race to power next-generation artificial intelligence (AI) systems, data connectivity has emerged as the critical bottleneck. As AI models balloon in size—from billions to trillions of parameters—compute resources alone are insufficient. According to Ayar Labs, approximately 70% of AI compute time is … Read More


Analog Bits Steps into the Spotlight at TSMC OIP

Analog Bits Steps into the Spotlight at TSMC OIP
by Mike Gianfagna on 09-29-2025 at 10:00 am

Analog Bits Steps into the Spotlight at TSMC OIP

The TSMC Open Innovation Platform (OIP) Ecosystem Forum kicked off on September 24 in Santa Clara, CA. This is the event where TSMC recognizes and promotes the vast ecosystem the company has created. After watching this effort grow over the years, I feel that there is nothing the group can’t accomplish thanks to the alignment and… Read More


Synopsys Collaborates with TSMC to Enable Advanced 2D and 3D Design Solutions

Synopsys Collaborates with TSMC to Enable Advanced 2D and 3D Design Solutions
by Daniel Nenni on 09-29-2025 at 6:00 am

synopsys tsmc oip 2025 leading the next wave of ai and multi die innovation for tsmc advanced node designs

Synopsys has deepened its collaboration with TSMC certifying the Ansys portfolio of simulation and analysis tools for TSMC’s cutting-edge manufacturing processes including N3C, N3P, N2P, and A16. This partnership empowers chip designers to perform precise final checks on designs, targeting applications in AI acceleration,… Read More


TSMC’s Push for Energy-Efficient AI: Innovations in Logic and Packaging

TSMC’s Push for Energy-Efficient AI: Innovations in Logic and Packaging
by Daniel Nenni on 09-25-2025 at 8:00 am

TSMC OIP 2025

In his keynote at the TSMC OIP Ecosystem Forum Dr. LC Lu, TSMC Senior Fellow and Vice President, Research & Development / Design & Technology Platform, highlighted the exponential rise in power demand driven by AI proliferation. AI is embedding itself everywhere, from hyperscale data centers to edge devices, fueling… Read More


Yuning Liang’s Painstaking Push to Make the RISC-V PC a Reality

Yuning Liang’s Painstaking Push to Make the RISC-V PC a Reality
by Jonah McLeod on 09-24-2025 at 10:00 am

Embedded World Germany

At Embedded World 2025 in Nuremberg, Germany, on March 11, 2025, Yuning Liang, DeepComputing Founder and CEO walked onto the stage with a mischievous smile and a challenge. “What’s the hardest product to make?” he asked rhetorically. “A laptop. It’s bloody hard… but we did it. You can swap the motherboard, you can upgrade, you can’t… Read More


Soitec’s “Engineering the Future” Event at Semicon West 2025

Soitec’s “Engineering the Future” Event at Semicon West 2025
by Daniel Nenni on 09-23-2025 at 10:00 am

Image Soitec event Semicon West

As part of the broader Semicon West ecosystem in Phoenix, Arizona, Soitec, a global leader in engineered substrates for semiconductors, hosts an exclusive, invitation-style event titled Engineering the Future: Soitec Substrates Powering Technology Megatrends on Wednesday, October 8, 2025, from 2:30 PM to 6:00 PM MST.

Held… Read More


Rise Design Automation Webinar: SystemVerilog at the Core: Scalable Verification and Debug in HLS

Rise Design Automation Webinar: SystemVerilog at the Core: Scalable Verification and Debug in HLS
by Daniel Nenni on 09-18-2025 at 10:00 am

Rise SemiWiki Webinar October


Key Takeaways

– High-Level Synthesis (HLS) delivers not only design productivity and quality but also dramatic gains in verification speed and debug – and it delivers them today.
–  Rise Design Automation uniquely enables SystemVerilog-based HLS and SystemVerilog verification, reusing proven verification… Read More