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Customized Foundation IP Enables the Next Generation of Automotive Compute

Customized Foundation IP Enables the Next Generation of Automotive Compute
by Kalar Rajendiran on 06-09-2026 at 10:00 am

chip design for blog

As vehicles become increasingly software-defined, automotive semiconductor suppliers face growing pressure to deliver higher compute performance while maintaining strict requirements for power efficiency, reliability, and long-term product support. Advanced driver assistance systems (ADAS), electrification, … Read More


Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems

Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems
by Daniel Nenni on 06-08-2026 at 10:00 am

synopsys samsung safe 2026 news announcement 1600x900

At SAFE Forum 2026, Synopsys announced significant advancements in its collaboration with Samsung Foundry, expanding AI-powered design, verification, test, and IP solutions for Samsung’s most advanced process technologies. The announcement underscores the growing importance of electronic design automation (EDA), … Read More


Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools

Intel: Pushing EMIB Forward: Design Methodology Insights with Synopsys Tools
by Daniel Nenni on 06-04-2026 at 6:00 am

synopsys intel linkedin update 1200x1200 v3

As advanced packaging becomes a critical enabler for next-generation semiconductor products, Intel continues to drive innovation through its Embedded Multi-die Interconnect Bridge (EMIB) technology. EMIB has emerged as a foundational packaging solution for heterogeneous integration, allowing multiple chiplets and… Read More


The Great Divide: A Tale of Three Hardware Emulation Architectures

The Great Divide: A Tale of Three Hardware Emulation Architectures
by Lauro Rizzatti on 05-06-2026 at 10:00 am

A Tale of Three Hardware Emulation Architectures

Hardware emulation arose as a necessity out of the needs of the eighties. By the mid-1980s, semiconductor designs had outgrown the practical limits of gate-level simulation. Gate-level simulation delivered accuracy, but at glacial pace; silicon prototypes performed at real-speed but arrived far too late. The industry needed… Read More


Synopsys and TSMC Deepen AI Design Alliance: What It Means

Synopsys and TSMC Deepen AI Design Alliance: What It Means
by Kalar Rajendiran on 05-05-2026 at 10:00 am

Synopsys Powering the next generation of AI

A recent announcement from Synopsys signals a meaningful escalation in the race to build next-generation AI hardware. The expanded collaboration between Synopsys and TSMC brings together silicon-proven IP, AI-driven design tools, and cutting-edge manufacturing processes in a tightly integrated effort to accelerate high-performance… Read More


How to Overcome the Advanced Node Physical Verification Bottleneck

How to Overcome the Advanced Node Physical Verification Bottleneck
by Mike Gianfagna on 04-22-2026 at 6:00 am

How to Overcome the Advanced Node Physical Verification Bottleneck

It is well-known that advanced semiconductor process technology presents substantial challenges across the full design flow and global supply chain. In this piece, we will focus on a particularly difficult problem – physical verification. This design step is the final gate to manufacturing. Producing a final tape‑out GDS … Read More


Podcast EP342: The Evolution and Impact of Physical AI with Hezi Saar

Podcast EP342: The Evolution and Impact of Physical AI with Hezi Saar
by Daniel Nenni on 04-17-2026 at 6:00 am

Daniel is joined by Hezi Saar, Executive Director of Product Marketing at Synopsys, Hezi is responsible for the mobile, automotive, and consumer IP product lines. He brings more than 20 years of experience in the semiconductor and embedded systems industries.

Dan explores the growing field of physical AI with Hezi, who explains… Read More


WEBINAR: Beyond Moore’s Law and The Future of Semiconductor Manufacturing Intelligence

WEBINAR: Beyond Moore’s Law and The Future of Semiconductor Manufacturing Intelligence
by Daniel Nenni on 04-16-2026 at 6:00 am

The Future of Semiconductor Manufacturing Intelligence

This is a live panel with industry experts who are on the leading edge of AI in semiconductor manufacturing. This is a must attend event for all levels of semiconductor professionals. I hope to see you there. 

The semiconductor industry faces unprecedented challenges as it pushes toward advanced nodes below 3nm, managing exponential… Read More


From Wooden Boards to White Gloves: How FPGA Prototyping and Emulation Became Two Worlds of Verification… and How the Convergence Is Unfolding

From Wooden Boards to White Gloves: How FPGA Prototyping and Emulation Became Two Worlds of Verification… and How the Convergence Is Unfolding
by Lauro Rizzatti on 04-13-2026 at 6:00 am

From Wooden Boards to White Gloves Table 1 (1)

FPGA prototyping and hardware emulation originated from two independent demands that emerged at roughly the same time, namely, the necessity to implement digital designs in reconfigurable hardware. This was conceivable given the newly introduced field programmable gate array (FPGA) device.

Yet from the very beginning they… Read More


From SoC to System-in-Package: Transforming Automotive Compute with Multi-Die Integration

From SoC to System-in-Package: Transforming Automotive Compute with Multi-Die Integration
by Daniel Nenni on 04-08-2026 at 10:00 am

Types of Mutli Deisgn Packaging Synsopsys

Modern automotive electronics are undergoing a rapid transformation driven by increasing compute demands, functional safety requirements, and the shift toward scalable semiconductor architectures. One of the most significant technological developments enabling this transformation is the adoption of multi-die system… Read More