SiC Forum2025 8 Static v3
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EDA

Electronic Design Automation

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya

Podcast EP221: The Importance of Design Robustness with Mayukh Bhattacharya
by Daniel Nenni on 05-03-2024 at 10:00 am
Categories: EDA, Synopsys

Dan is joined by Mayukh Bhattacharya, Engineering, Executive Director, at Synopsys. Mayukh has been with Synopsys since 2003. For the first 14 years, he made many technical contributions to PrimeSim XA. Currently, he leads R&D teams for PrimeSim Design Robustness and PrimeSim Custom Fault products. He was one of the early… Read More

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Self-heating and trapping enhancements in GaN HEMT models

Self-heating and trapping enhancements in GaN HEMT models
by Don Dingee on 05-02-2024 at 10:00 am
Categories: EDA, Keysight EDA

RTH0 extraction

High-fidelity models incorporating real-world, cross-domain effects are essential for accurate RF system simulation. The surging popularity of gallium nitride (GaN) technology in 5G base stations, satellite communication, defense systems, and other applications raises the bar for transistor modeling. Keysight dives… Read More

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Anirudh Keynote at CadenceLIVE 2024. Big Advances, Big Goals

Anirudh Keynote at CadenceLIVE 2024. Big Advances, Big Goals
by Bernard Murphy on 05-01-2024 at 6:00 am
Categories: AI, Automotive, Cadence, Chiplet, EDA

Anirudh keynote at CadenceLive 2024

The great things about CEO keynotes, at least from larger companies, is that you not only learn about recent advances but you also get a sense of the underlying algorithm for growth. Particularly reinforced when followed by discussions with high profile partner CEOs on their directions and areas of common interest. I saw this recently… Read More

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Will my High-Speed Serial Link Work?

Will my High-Speed Serial Link Work?
by Daniel Payne on 04-30-2024 at 10:00 am
Categories: EDA, Siemens EDA
1 Comment

traditional flow min

PCB designers can perform pre-route simulations, follow layout and routing rules, hope for the best from their prototype fab, and yet design errors cause respins which delays the project schedule. Just because post-route analysis is time consuming doesn’t mean that it should be avoided. Serial links are found in many PCB designs,… Read More

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Enabling Imagination: Siemens’ Integrated Approach to System Design

Enabling Imagination: Siemens’ Integrated Approach to System Design
by Kalar Rajendiran on 04-30-2024 at 6:00 am
Categories: AI, Analytics, Chiplet, EDA, Emulation, Prototyping, Siemens EDA

Siemens EDA Important to Siemens

In today’s rapidly advancing technological landscape, semiconductors are at the heart of innovation across diverse industries such as automotive, healthcare, telecommunications, and consumer electronics. As a leader in technology and engineering, Siemens plays a pivotal role in empowering the next generation … Read More

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Design Stage Verification Gives a Boost for IP Designers

Design Stage Verification Gives a Boost for IP Designers
by Mike Gianfagna on 04-25-2024 at 6:00 am
Categories: EDA, Siemens EDA

Design Stage Verification Gives a Boost for IP Designers

The concept of shift left is getting to be quite well-known. The strategy involves integrating various checks typically performed later in the design process into earlier stages. The main benefit is to catch and correct defects or errors at an earlier stage when it’s easier and faster to address. For complex SoC design, … Read More

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Fault Sim on Multi-Core Arm Platform in China. Innovation in Verification

Fault Sim on Multi-Core Arm Platform in China. Innovation in Verification
by Bernard Murphy on 04-24-2024 at 6:00 am
Categories: Cadence, EDA

Innovation New

How much can running on a multi-core (Arm) CPU speed up fault simulation? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome.

The Innovation

This month’s pick is Fault… Read More

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Lifecycle Management, FuSa, Reliability and More for Automotive Electronics

Lifecycle Management, FuSa, Reliability and More for Automotive Electronics
by Bernard Murphy on 04-22-2024 at 6:00 am
Categories: AI, Analytics, Automotive, EDA, Synopsys

Lifecycle Management for Automotive Electronics min

Synopsys recently hosted an information rich-webinar, modestly titled “Improving Quality, FuSa, Reliability, and Security in Automotive Semiconductors”. I think they undersold the event; this was really about managing all of those things through the lifecycle of a car, in line with auto OEMs strategies for the future of the… Read More

Podcast EP219: How Synopsys Addresses Debug and Coverage Closure Challenges with Robert Ruiz

Podcast EP219: How Synopsys Addresses Debug and Coverage Closure Challenges with Robert Ruiz
by Daniel Nenni on 04-19-2024 at 10:00 am
Categories: EDA, Synopsys

Dan is joined by Robert Ruiz, product management director responsible for strategy and business growth of several verification products at Synopsys. Robert has held various marketing and technical positions for leading functional verification and test automation products at various companies including Synopsys, Novas… Read More

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Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!

Semi Market Decreased by 8% in 2023… When Design IP Sales Grew by 6%!
by Eric Esteve on 04-19-2024 at 6:00 am
Categories: Arm, IP, IPnest, Semiconductor Services, Synopsys

Top10 Table 2023

Design IP revenues had achieved $7.04B in 2023, with disparity between license, growing by 14% and royalty decreasing by 6%, and main categories. Processor (CPU, DSP, GPU & ISP) slightly growing by 3.4% when Physical (SRAM Memory Compiler, Flash Memory Compiler, Library and I/O, AMS, Wireless Interface) slightly decreasing… Read More