Accurate, complete, and consistent technical documentation is a critical element of success for any embedded system design project. This includes IP, SoCs, and the associated hardware and software infrastructure. When documentation contains errors, the consequences go beyond engineering inefficiency. Errors that drive… Read More
Author: Mike Gianfagna
Learn How llmda Uses Agentic AI to Generate Hardware Docs & Keep Them Consistent
A Look at the High-Profile Speakers Presenting at #DAC2026
Many of us think of DAC as an important trade show for the Semiconductors and EDA industries. That is certainly part of the history of DAC, but the event is also a highly prestigious technical conference dating back to 1964. In fact, the exhibits at DAC began 20 years after the conference started. That long history as a premier technical… Read More
Why Generic LLMs Fall Short for Critical Engineering Documentation
Engineering documentation has always been difficult to produce, maintain, and scale. But with the rise of generative AI, many organizations are asking a reasonable question: can a general-purpose large language model (LLM) like Claude automate the work? At first glance, the answer appears to be yes.
Modern LLMs can generate… Read More
Caspia’s AI Makes You a Security Verification Expert
Let’s face it, powerful, highly trained AI is making it easier to find security flaws in many systems. When the attack surface becomes the underlying hardware, the risks grow exponentially. Unlike software, hardware can’t easily be “patched”. Early, advanced security verification is the way to mitigate these risks, but doing… Read More
How to Overcome the Advanced Node Physical Verification Bottleneck
It is well-known that advanced semiconductor process technology presents substantial challenges across the full design flow and global supply chain. In this piece, we will focus on a particularly difficult problem – physical verification. This design step is the final gate to manufacturing. Producing a final tape‑out GDS … Read More
proteanTecs at Chiplet Summit – Changing the Game for Health & Performance Monitoring of Chiplets
The recent Chiplet Summit 2026 was a great place to learn about new chiplet designs, emerging standards, and a growing array of support technologies to help design and manufacture chiplet-based systems. In my travels at the show, I found a lot of technology that fit these descriptions. But there were also companies at the show that… Read More
Analog Bits Demos Real-Time On-Chip Power Sensing and Delivery on N2P at the TSMC 2026 Technology Symposium
Analog Bits has a way of stealing the show at every event they attend. The formula is actually quite straight-forward – come to the show with the most relevant, highest impact IP running on the most advanced process. The company will be applying this strategy again at the upcoming TSMC 2026 Technology Symposium with an array of real-time… Read More
Exploring the Hidden Complexity of Modern Power Electronics Design – A Siemens White Paper
Review the specifications of any state-of-the-art microcontroller and you will discover the high dynamic current the device can consume. Examining the high clock rates and low tolerable voltage drop will lead you to the all-important power delivery network, or PDN. Components here include power planes, layer stack-up, decoupling… Read More
yieldHUB Expands Its Impact with New Technology and a New Website
yieldHUB is a unique company that focuses on yield optimization for the semiconductor industry. The company aims to bring engineering teams together with a platform that allows sharing of data analytics and knowledge about products to improve yield. This goal is certainly fueled by unifying data from multiple steps in the manufacturing… Read More
yieldWerx Delivers a Master Class in Co-Packaged Photonics Implementation
We all know the semiconductor industry is seeing a new era of data intensity. The industry’s response includes advanced semiconductor design strategies, the adoption of chiplets, and the integration of optical I/O and photonics to enable higher performance, faster AI computation, and increased modularity. Co-packaged photonics… Read More
ASML High-NA EUV is Not Ready for High-Volume Production