Because of its open and modular nature, RISC-V has faced recognizable security challenges stemming from fragmentation, performance inefficiencies, and inherent vulnerabilities. Fragmentation across implementations leads to inconsistencies, making it difficult to enforce uniform security measures. Performance… Read More
Author: Jonah McLeod
RISC-V’s Privileged Spec and Architectural Advances Achieve Security Parity with Proprietary ISAs
Harnessing Modular Vector Processing for Scalable, Power-Efficient AI Acceleration
The dominance of GPUs in AI workloads has long been driven by their ability to handle massive parallelism, but this advantage comes at the cost of high-power consumption and architectural rigidity. A new approach, leveraging a chiplet-based RISC-V vector processor, offers an alternative that balances performance, efficiency,… Read More
An Open-Source Approach to Developing a RISC-V Chip with XiangShan and Mulan PSL v2
As RISC-V gains traction in the global semiconductor industry, developers are exploring fully open-source approaches to processor design. XiangShan, a high-performance RISC-V CPU project, combined with the Mulan Permissive License v2 (Mulan PSL v2), represents a community-driven, transparent alternative to proprietary… Read More
Rethinking Multipatterning for 2nm Node