AI and VLSI: A Symbiotic Revolution at DAC 2025

On July 18, 2025, a DACtv panel discussion titled “AI and VLSI: A Symbiotic Revolution” explored the transformative interplay between artificial intelligence (AI) and very-large-scale integration (VLSI) design. Moderated by Ramuni Nagasetty from NATCast. The panel featured Arijit Raychowdhury (Georgia Tech), Dr. Rob Aitken (National Advanced Packaging Manufacturing Program), and Sydney Tsai (IBM Research), Monoj Selva (Intel), and Priya Panda from Yale University. The session delved into how AI is reshaping VLSI design, from circuit optimization to manufacturing, while addressing challenges like outdated tools and sustainability.

Arijit Raychowdhury, a professor and chair at Georgia Tech, highlighted his experience in circuit design, having worked at Intel and Texas Instruments. His research leverages EDA tools for digital and mixed-signal circuits, emphasizing AI’s role in enhancing design efficiency. Rob Aitken, with a background at Synopsys, ARM Research, and HP’s internal EDA, discussed advanced packaging’s role in VLSI, noting its importance for AI accelerators. Sydney Tsai from IBM Research detailed their dual focus: designing AI accelerators (e.g., systolic arrays, in-memory computing) and applying AI to manufacturing (e.g., defect analysis) and large language models (LLMs) for design, such as an “Ask EDA” chatbot.

The panel underscored the symbiotic relationship between AI and VLSI. AI optimizes VLSI design by automating tasks like placement, routing, and verification, reducing design cycles for complex chips. Conversely, VLSI advancements enable specialized AI hardware, such as accelerators, to handle growing computational demands. For instance, IBM’s work on near-memory computing addresses AI’s data-intensive needs, while their LLM-driven tools streamline design workflows, leveraging data from IBM’s Albany Research Center for defect root cause analysis.

A key discussion point was the semiconductor industry’s lag in adopting modern AI tools due to outdated IT infrastructure. An audience member questioned the reliance on legacy tools like Notepad++ and VNC, which are incompatible with advanced AI platforms like Copilot or Cursor, particularly for SystemVerilog. Manoj emphasized the need for a return-on-investment (ROI) approach, combining incentives like code introspection, generation, and automated testing with mandates to shift to modern IDEs. He noted that large semiconductor companies are cautious due to high failure costs, with hardware engineers inherently skeptical of new tools. This conservatism, while risk-averse, hinders AI integration, as companies prioritize stability over innovation.

Sustainability emerged as a critical theme. Arijit stressed the environmental cost of computing, advocating for educating younger generations about resource usage to minimize waste. AI-driven VLSI design can optimize power efficiency in chips, crucial for data centers consuming gigawatts of power. Aitken highlighted advanced packaging’s role in reducing energy losses in AI chips, while Tsai noted IBM’s efforts in using AI to enhance manufacturing yield, reducing waste. The panel agreed that AI and VLSI must evolve together to address climate challenges, with efficient chip designs enabling greener technologies.

The discussion also touched on workforce dynamics, with an audience member humorously questioning why hardware engineers aren’t paid more than software engineers given the complexity. The panel acknowledged the high stakes in hardware design, where errors are costly, but didn’t delve into compensation specifics. Ramuni Nagasetty wrapped up by emphasizing the need for industry-academia collaboration to bridge the gap between cutting-edge AI tools and VLSI applications, urging the audience to drive adoption despite resistance.

This panel highlighted the transformative potential of AI in VLSI, from accelerating design to enabling sustainable, high-performance chips, while candidly addressing barriers like legacy infrastructure and cultural inertia, setting the stage for a collaborative push toward innovation.

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