Applications Engineer, II

We’re looking for DFT Application Engineer to join our team. The engineer works in a project-oriented and customer facing environment to deliver complex DFT flows and methodologies across varying industry segments like Autonomous Transportation, Mission critical AI, High performance computing and Mobile networking.   The engineer also has opportunity to interacts with the customers to assess their methodologies, flows, advance process node test chip and provides feedback to the TestMAX Product RD with customer DFT requirements and help to keep improving TestMAX products.

Responsibilities may include a subset or all the following:

• Consultation for test solutions during design planning/budgeting.
• Test methodology design rules checking during RTL coding stages.
• Implementation of design for test (DFT) compression, automatic test generation (ATPG) for single stuck at (SSAF), Transition Delay Fault, Cell-aware faults, and other advanced fault models
• Architects and implements solutions for built-in self-test (Memory and Reason BIST) circuitry to test devices in the field.
• Participations in customer’s design and flow reviews.
• Diagnostics study and debug.
• Provides methodologies for test automation flow integration with design planning, RTL parser, scan synthesis, physical design, and sign-off verification tools (static timing, simulation, formal verification).
• Develops white papers on methodology and other documentation as may be required for projects.
• Provides technical consulting/expertise for customers operating Synopsys test automation tools in a wide variety of application scenarios.

Key Qualifications

• Upcoming graduates in Electronical, Microelectronics or related fields (graduate in 2024)
• Interested in Design for Testing field (DFT)
• Courses taken in circuit design, digital IC design
• Excellent knowledge of Hardware Description Language (Verilog/VHDL) and RTL design
• Excellent knowledge in scripting, TCL and Perl are preferred.
• Ability and desire to dig into and solve complex parallel programming challenges
• Excellent debug and problem-solving skills
• Excellent verbal and written communication skills
• Excellent knowledge of the Linux OS and tools
• Desire to learn and explore new technologies
• Design and verification experience are a plus.
• Know Design-for-testing concept is a plus

Preferred Experience

• Familiar with general IC design flow
• Familiar with Verilog coding style and best practices
• Familiar with VLSI implementation flow
• Excellent English communication skill
• Proficient user of Perl or TCL is preferred