Electronic Design Automation, or EDA, is the software infrastructure that transforms a hardware specification into a manufacturable integrated circuit. At advanced process nodes, the problem is no longer simply drawing transistors or connecting gates. A modern system-on-chip contains billions of standard cells, hundreds… Read More
Foundation IP for Intel 18A: Technical Overview and Why It MattersSynopsys Foundation IP for Intel 18A is a…Read More
WEBINAR: Defacto is Boosting Front-end SoC Design With AI-Powered EDA toolsThe real promise of AI in EDA is…Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too LateChip-level vulnerability is becoming an existential threat for…Read More
Why Huawei Says It Will Match TSMC's Most Advanced Chips by 2031Huawei’s assertion that it could match TSMC in…Read MoreBeyond Workflow Agents: Toward Design Intelligence in Analog EDA
Over the last year, the EDA industry has started using a new vocabulary: agents, super agents, mental models, native skills, playbooks, RAG, MCP, autonomous workflows, and AI-first design.
The language is new, but the motivation is familiar to anyone who has worked in chip design.
Design complexity keeps increasing. The number… Read More
MooresLabAI at DAC 2026: Why the Future of Semiconductor Engineering Is Agentic, Not Just Generative
For decades, semiconductor innovation has been constrained not by imagination, but by engineering capacity. While transistor density has continued to advance, the process of building chips has remained fundamentally manual, fragmented across specifications, RTL, verification, debugging, coverage analysis, and signoff.… Read More
Caspia Technologies is pioneering a new, agentic chip and system security approach at DAC 2026
Caspia’s advanced tools and agents blend seamlessly with existing design flows to add expert-level security verification capabilities for all design teams. Founded in 2020 and headquartered in Gainesville, Florida, Caspia brings together expertise in chip design, fabrication, test, and verification with a deep understanding… Read More
IP Lifecycle Management in the AI Era
Large design enterprises have multiple concurrent activities around IP of various types: software/firmware, blocks defined in RTL or HLS, verification IPs of multiple different types, physical implementations, scripts/files for timing, power management, etc., etc. Each of these continues to evolve and branch to serve … Read More
See Autonomous Chip Design in Action with ChipAgents at DAC 2026
Making the AI wave at DAC 2026 in Long Beach
DAC comes to Long Beach for the first time in 2026, with artificial intelligence expected to be one of the central topics across the conference program and exhibition floor.
For semiconductor design and verification teams, the discussion has moved beyond whether AI can assist engineers.… Read More
The Packaging PDK Is the Missing Layer for Co-Packaged Optics
From Photonic Device Design to Electro-Optical Realization
Co-packaged optics will not scale through photonic device performance alone.
As AI infrastructure pushes bandwidth, power, latency, and reach to new limits, optics is moving closer to the compute engine. The industry is no longer asking only whether a photonic device… Read More
Demonstrating the EasyAI ECO Suite – An AI-Powered Functional ECO Solution at DAC 2026
Easy-Logic, a leading provider of high-performance Engineering Change Order (ECO) solutions in Electronic Design Automation (EDA), will showcase its latest innovation — the EasyAI ECO Suite — at DAC in Los Angeles, July 27–29, 2026. This intelligent ECO solution integrates AI engines into the entire ECO workflow and systematically… Read More
The Accidental Infrastructure: How Crypto Miners Built the Foundation of the AI Boom
Most crypto forty-niners died broke in a warehouse full of their computing rigs. Former Ethereum miner CoreWeave took its gold to Wall Street. On June 22, 2026, it joined the Nasdaq-100 — fifteen months after its IPO, nine years after its founders assembled their first GPU rig in a New Jersey office.
The people who built the physical… Read More
From Detection to Safety: Reframing Fault Simulation for Functional Safety
In the early 1980s, when computer-aided engineering (CAE), the precursor to modern electronic design automation (EDA), was just taking shape, my professional trajectory shifted in a way that would prove foundational. I joined Teradyne, the Boston-based leader in automated test equipment (ATE), and I encountered for the first… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics