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Semiconductor Expert Forum

Podcast EP366: How Cognichip is Changing Chip Design with Faraj Aalaei

Podcast EP366: How Cognichip is Changing Chip Design with Faraj Aalaei
by Daniel Nenni on 09-16-2026 at 10:00 am
Categories: AI, EDA

Daniel is joined by the CEO of Cognichip, Faraj Aalaei, a successful visionary entrepreneur with over 40 years of distinguished experience in communications and networking technologies. As a leading entrepreneur in Silicon Valley, he was responsible for building and leading two semiconductor companies through IPOs as a founder… Read More

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Arm targets the agentic AI era with new edge, cloud and robotics platforms

Arm targets the agentic AI era with new edge, cloud and robotics platforms
by Daniel Nenni on 09-16-2026 at 8:00 am
Categories: Arm, IP

Arm targets the agentic AI era with new edge, cloud and robotics platforms

Arm is expanding its computing platform for an era in which artificial intelligence does more than respond to individual prompts. The company expects AI agents to operate continuously across phones, data centers, vehicles, robots and other physical systems—perceiving their surroundings, reasoning about objectives and … Read More

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Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AI

Rethinking AI Chips: How VSORA Redesigned the Hardware That Runs AI
by Lauro Rizzatti on 09-16-2026 at 6:00 am
Categories: Semiconductor, VSORA

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Instead of tweaking existing designs, VSORA built an AI chip from scratch to fix the real bottleneck: moving data fast enough to keep the math circuits busy.

There’s a version of the AI hardware story that everyone in the chip industry has heard a hundred times. A startup raises money on a clever chip design, promises to topple… Read More

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A Study of Photoresist Bake Influence on Stochastics for DUV Immersion Lithography

A Study of Photoresist Bake Influence on Stochastics for DUV Immersion Lithography
by Admin on 09-15-2026 at 10:00 am
Categories: Lithography
1 Comment

Photoresist Bake Influence on DUV Stochastics

Deep-ultraviolet (DUV) immersion lithography remains a critical patterning technology for advanced semiconductor manufacturing. Using a 193 nm ArF exposure system with water between the projection lens and wafer, immersion lithography increases numerical aperture and enables smaller features than dry exposure. However,… Read More

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UWB Without the Integration Headache: Ceva and LG Bring Precision to More Chips

UWB Without the Integration Headache: Ceva and LG Bring Precision to More Chips
by Daniel Nenni on 09-15-2026 at 8:00 am
Categories: Ceva, IP

UWB Without the Integration Headache Ceva and LG Bring Precision to More Chips

Ceva and LG Electronics have joined forces to remove one of the biggest obstacles to ultra-wideband adoption: integrating a complete radio, baseband and software stack into a production system-on-chip. Their joint platform combines Ceva-Waves UWB baseband intellectual property and software with an RF front end developed… Read More

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PCIe 7 Switch IP with Time Division Multiplexing: Powering the Next Generation of AI Connectivity

PCIe 7 Switch IP with Time Division Multiplexing: Powering the Next Generation of AI Connectivity
by Admin on 09-15-2026 at 6:00 am
Categories: IP, Rambus

PCIe 7 Switch IP with Time Division Multiplexing

By Tim Messegee, Senior Director of Solutions Marketing at Rambus

PCI Express (PCIe), PCIe switches, Time Division Multiplexing (TDM), Network Interface Cards (NICs), and SmartNICs are all well-established technologies that have formed the backbone of computing and networking systems for years. More recently, SuperNICs… Read More

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CAST Moves the Full TCP/IP Stack into Hardware at 100 Gbps

CAST Moves the Full TCP/IP Stack into Hardware at 100 Gbps
by Daniel Nenni on 09-14-2026 at 10:00 am
Categories: CAST, IP

CAST TCPIP 100G PressFigure

CAST has introduced TCPIP-100G, a synthesizable intellectual-property core that implements a complete TCP/IP stack in hardware for ASICs and FPGAs. The core is designed to transmit and receive at up to 100 Gbps without depending on a host processor. That distinction is important: this is not simply a checksum engine or a network-interface… Read More

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Semiconductor Engineering Has a State-Continuity Problem

Semiconductor Engineering Has a State-Continuity Problem
by Moh Kolb on 09-14-2026 at 8:00 am
Categories: EDA

Semi eng state conti Problem sept11 semiwiki

Product realization depends not only on reaching the next engineering state, but on preserving the relationships between states from intent through qualification, release, and lifecycle learning.

Semiconductor development is usually described as a sequence of activities: architecture, design, fabrication, packaging,… Read More

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Samtec Puts AI’s Interconnect Bottleneck on Display at ECOC and AI Infra Summit

Samtec Puts AI’s Interconnect Bottleneck on Display at ECOC and AI Infra Summit
by Daniel Nenni on 09-14-2026 at 6:00 am
Categories: Samtec, Semiconductor Services

Samtec Connects the AI Era

Samtec is using two major 2026 industry events to make a clear engineering argument: faster accelerators alone will not determine the performance of next-generation artificial-intelligence infrastructure. The copper and optical links connecting chips, packages, boards, racks and data centers must scale in bandwidth, … Read More

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Nvidia Sees AGI While OpenAI Sees Danger

Nvidia Sees AGI While OpenAI Sees Danger
by Daniel Nenni on 09-13-2026 at 10:00 am
Categories: AI, Semiconductor

Nvidia Sees AGI While OpenAI Sees Danger

Jensen Huang’s declaration that “AGI has arrived” is less a scientific verdict than a compressed statement about infrastructure, economics and momentum. His evidence is OpenAI’s GPT-6 Astra, reportedly trained on more than 100,000 Nvidia Grace Blackwell NVL72 systems, followed by a promise that another 400,000 GPUs are coming… Read More