One of the important but often unrecognized aspects of engineering is re-building the infrastructure underneath key design tools. Sometimes this gives a new desirable capability but often a lot of the effort is simply to modernize the code base so that it is possible to continue development effectively going forward. For example, I remember in Compass days replacing our creaky graphics infrastructure with something more modern. It was expensive to do and it didn’t generate any additional revenue, but the old code had been written well over a decade before and was no longer adequate. Because this sort of infrastructure underlies everything, it is rather like changing the wheel of a car without stopping.
I met with Bob Smith of Magma late last year, and coincidentally I ran into Hamid Savoj, the CTO, at a conference on 3D chips a few days later. They have successfully done one of these changing the wheels without stopping exercises recently.
Magma’s engineering team have swapped out the old timing and extraction engines from Talus and replacing them with the Tekton timing engine and the QCP extraction engine to create Talus Vortex 1.2. This can place and route over one million cells per day with all the modern requirements for crosstalk, metal migration, multi-corner etc. It can handle up to 3M cells flat, which is important since probably one of the biggest wishes of the semiconductor customers is to be able to handle designs flat, or with as little hierarchy as they can get away with. Ideally today they would like to be able to handle 20 million cells or more flat. All hierarchy added in any design tool due to capacity limitations of the tool tends to cause design efficiency to drop, sometimes dramatically if the number of blocks grows large. But wait, there’s more, as the old ads say.
Along with some further infrastructure work they have also created Talus Vortex FX which is the first distributed place and route solution. This pushes up the performance to over 3 million cells per day, and the capacity up above 8 million cells, which more than triples designer productivity. It analyzes the design, then partitions it into pieces that can be processed separately on their own server, and then eventually combines all the results back together (they call this Smart Sync). Some design tools are fairly easy to distribute (for example, DRC can be run on different parts of the chip in parallel and then stitched back together), some are very difficult (simulation, because there is a single global time-base so it is hard to find things that are independent) and some in between like place and route, although clever algorithms are needed to decide how to divide up the design amongst the computing resources.
As an irrelevant aside, in 1952 a car was driven across the US and back without stopping; of course it needed to have facilities to change a wheel without stopping. It can be seen today in the San Diego Automotive Museum.Share this post via: