Join Comer Industries and Asotech in this webinar to see how Ansys simulations optimize gearbox durability and performance.
DATE / TIME:
February 4, 2025
10 AM EST / 4 PM CET / 8:30 PM IST
This webinar will delve into how Comer Industries, with the support of Asotech, leverages Ansys simulations to ensure the structural
Engineers solve today’s challenges by leveraging simulation, and the Technical University of Madrid (UPM) addresses this need with its Master’s Degree in Numerical Simulation. Developed in collaboration with Ansys, the program equips engineers to bridge the industry’s skills gap by fostering a deep understanding
Join us for a new approach to designing lumped-element filters and discover how easy such design can be while achieving the desired accuracy.
TIME:
January 28, 2025
11 AM EDT / 5 PM CET
Venue:
Virtual
Streamline the design of lumped-element and planar filters with Ansys Nuhertz Filter Solutions. For lumped-element filters,
From aerospace to automotive to medical to high technology, the right materials and design make a huge difference in a product’s performance, cost, and sustainability. But how do you choose the best material? Sign up for this webinar to find out.
TIME:
January 21, 2025
11 AM EST / 5 PM CET / 9:30 PM IST
Materials and design
Explore the next generation of USB technology with USB4v2, offering unprecedented data transfer speeds of up to 80Gbps, improved power delivery, and backward compatibility with USB-C and Thunderbolt devices.
This webinar dives into the technical advancements, use cases,… Read More
Lee Harrison
Tessent Product Marketing Director
Siemens EDA
Continuous testing and monitoring of devices is required to guarantee optimal performance, reliability and safety throughout their operation. Tessent In-System Test
Presenters: Martin Beeby, Head of Advanced Avionics Systems and Managing Director of ConsuNova EU and Janusz Kitel, DO-254 Program Manager at Aldec Inc.
Abstract:
System on Chip (SoC) devices are transforming the landscape of advanced aviation systems, offering unparalleled integration of multiple functionalities within… Read More
The ESD Alliance, a SEMI Technology Community, is hosting a webinar series, “Savage on Security,” moderated by Warren Savage, Researcher at University of Maryland, Applied Research Laboratory for Intelligence and Security.
New horizons for semiconductors have been revealed by innovations in heterogeneous… Read More
When designing IP for system-on-chip (SoC) and application-specific integrated circuit (ASIC) implementations, IP designers strive for perfection. Optimal engineering often yields the smallest die area, thereby reducing both cost and power consumption while maximizing performance.
Similarly, when incorporating embedded… Read More
As the complexity of modern System-on-Chip (SoC) designs continues to rise, achieving energy efficiency measured as performance per watt has become a crucial design goal. With the increasing demand for powerful, multifunctional chips, balancing performance with power consumption has become essential. Realistic workloads… Read More
